soc/intel/apollolake: Clean up code by using common FAST_SPI module

This patch currently contains the following -
 1. Use SOC_INTEL_COMMON_BLOCK_FAST_SPI kconfig for common FAST_SPI code.
 2. Perform FAST_SPI programming by calling APIs from common FAST_SPI library.
 3. Use common FAST_SPI header file.

Change-Id: Ifd72734dadda541fe4c828e4f1716e532ec69c27
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/19080
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Barnali Sarkar
2017-03-28 16:32:33 +05:30
committed by Furquan Shaikh
parent 7146445be9
commit e70142c9c2
8 changed files with 9 additions and 540 deletions

View File

@ -22,7 +22,7 @@
#include <commonlib/region.h>
#include <console/console.h>
#include <fmap.h>
#include <soc/flash_ctrlr.h>
#include <intelblocks/fast_spi.h>
#include <soc/mmap_boot.h>
/*
@ -65,7 +65,7 @@ static struct xlate_region_device real_dev CAR_GLOBAL;
static void bios_mmap_init(void)
{
size_t size, start, bios_end, bios_mapped_size;
size_t size, start, bios_mapped_size;
uintptr_t base;
size = car_get_var(bios_size);
@ -73,18 +73,7 @@ static void bios_mmap_init(void)
/* If bios_size is initialized, then bail out. */
if (size != 0)
return;
/*
* BIOS_BFPREG provides info about BIOS Flash Primary Region
* Base and Limit.
* Base and Limit fields are in units of 4KiB.
*/
uint32_t val = spi_flash_ctrlr_reg_read(SPIBAR_BIOS_BFPREG);
start = (val & SPIBAR_BFPREG_PRB_MASK) * 4 * KiB;
bios_end = (((val & SPIBAR_BFPREG_PRL_MASK) >>
SPIBAR_BFPREG_PRL_SHIFT) + 1) * 4 * KiB;
size = bios_end - start;
start = fast_spi_get_bios_region(&size);
/* BIOS region is mapped right below 4G. */
base = 4ULL * GiB - size;