cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx
This is how these MSR's are referenced in Intel® 64 and IA-32 Architectures Software Developer’s Manual. The purpose is to differentiate with MSR_SMRR_PHYSx. Change-Id: I54875f3a6d98a28004d5bd3197923862af8f7377 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Patrick Georgi
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commit
e750b38e48
@ -70,8 +70,8 @@ static inline void write_smrr(struct smm_relocation_params *relo_params)
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{
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printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
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relo_params->smrr_base.lo, relo_params->smrr_mask.lo);
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wrmsr(SMRR_PHYS_BASE, relo_params->smrr_base);
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wrmsr(SMRR_PHYS_MASK, relo_params->smrr_mask);
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wrmsr(IA32_SMRR_PHYS_BASE, relo_params->smrr_base);
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wrmsr(IA32_SMRR_PHYS_MASK, relo_params->smrr_mask);
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}
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static inline void write_emrr(struct smm_relocation_params *relo_params)
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@ -61,8 +61,8 @@ static inline void write_smrr(struct smm_relocation_params *relo_params)
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{
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printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
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relo_params->smrr_base.lo, relo_params->smrr_mask.lo);
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wrmsr(SMRR_PHYS_BASE, relo_params->smrr_base);
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wrmsr(SMRR_PHYS_MASK, relo_params->smrr_mask);
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wrmsr(IA32_SMRR_PHYS_BASE, relo_params->smrr_base);
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wrmsr(IA32_SMRR_PHYS_MASK, relo_params->smrr_mask);
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}
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/* The relocation work is actually performed in SMM context, but the code
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