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bd82x6x: Fix early EHCI BAR programming

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Change EHCI #2 to different BAR from EHCI #1.

Even if the ECHI controllers are not to be addressed, it is bad idea
to set two different devices to claim the same PCI memory cycles.

Change-Id: Ib6f7cfac5acf3f8170508547d1584af90273e8c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3471
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
This commit is contained in:
Kyösti Mälkki
2013-06-15 12:29:23 +03:00
committed by Nico Huber
parent cca685936a
commit e761b71e52
1 changed files with 2 additions and 2 deletions
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4
src/southbridge/intel/bd82x6x/early_usb.c
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@@ -49,9 +49,9 @@ void enable_usb_bar(void)
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config32(usb0, PCI_COMMAND, cmd); pci_write_config32(usb0, PCI_COMMAND, cmd);
/* USB Controller 1 */ /* USB Controller 2 */
pci_write_config32(usb1, PCI_BASE_ADDRESS_0, pci_write_config32(usb1, PCI_BASE_ADDRESS_0,
PCH_EHCI1_TEMP_BAR0); PCH_EHCI2_TEMP_BAR0);
cmd = pci_read_config32(usb1, PCI_COMMAND); cmd = pci_read_config32(usb1, PCI_COMMAND);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config32(usb1, PCI_COMMAND, cmd); pci_write_config32(usb1, PCI_COMMAND, cmd);