arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits

With top-aligned bootblock this is no longer globally needed.
The default maximum is now a generous 256 KiB with couple
platforms having lower limits of 32 KiB and 64 KiB.

Change-Id: Ib1aee44908c0dcbc17978d3ee53bd05a6200410c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2020-05-25 08:52:07 +03:00
parent 49dbbe99c2
commit e76ce871c8
25 changed files with 7 additions and 90 deletions

View File

@ -37,10 +37,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
config ENABLE_MRC_CACHE
bool "Use cached memory configuration"
default n

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@ -36,10 +36,6 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
endif # CPU_AMD_PI
source "src/cpu/amd/pi/00630F01/Kconfig"

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@ -32,7 +32,6 @@ config DCACHE_BSP_STACK_SIZE
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x4000 if BOOTBLOCK_CONSOLE
default 0x2000
default 0x10000
endif

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@ -10,10 +10,6 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
select SSE
select SETUP_XIP_CACHE
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
config DCACHE_RAM_BASE
hex
default 0xfefc0000

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@ -22,8 +22,4 @@ config DCACHE_BSP_STACK_SIZE
hex
default 0x2000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
endif