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mb: remove duplicated Make code for spd.bin generation

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Drop duplicated code for spd.bin generation that is provided globally
in lib/Makefile.inc.

For all affected boards it has been verified that the output binary
functionally matches the original one. The changed execution order of
Make instructions influenced the cbfs file order. Hence, the rom images
can't be compared directly.

Thus, the output files of the two timeless abuild runs have been compared.
Further, it was verified that the final files in cbfs stay identical, by
comparing the extracted cbfs of each board.

The boards (possibly) needing modification could be found with something
like this (with false positives, though):

find src/mainboard -name Makefile.inc | \
  xargs egrep 'SPD_BIN|SPD_DEPS' | cut -d: -f1 | sort -u

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Icd3ac0fd6c901228554115c6350d88bb49874587
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner
2020-08-25 13:55:53 +02:00
committed by Michael Niewöhner
parent f0eb1925e4
commit e83d30bb5a
96 changed files with 133 additions and 1029 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/intel/cannonlake_rvp/spd/Makefile.inc
View File

@@ -2,8 +2,6 @@
romstage-y += spd_util.c
SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = empty # 0b000
SPD_SOURCES += samsung_ddr4_4GB # 0b001 Dual Channel 4GB
SPD_SOURCES += samsung_lpddr4_8GB # 0b001 Dual Channel 8GB

1
src/mainboard/intel/harcuvar/Kconfig
View File

@@ -19,6 +19,7 @@ config MAINBOARD_PART_NUMBER
config ENABLE_FSP_MEMORY_DOWN
bool "Enable Memory Down"
default n
select GENERIC_SPD_BIN
help
Select this option to enable Memory Down function.

15
src/mainboard/intel/harcuvar/spd/Makefile.inc
View File

@@ -2,23 +2,8 @@
romstage-y += spd.c
SPD_BIN = $(obj)/spd.bin
# Order matters for SPD sources. The following indices
# define the SPD data to use.
SPD_SOURCES = micron_4GiB_dimm_MTA9ASF51272PZ-2G1A2
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
# Include spd rom data
$(SPD_BIN): $(SPD_DEPS)
for f in $+; \
do for c in $$(cat $$f | grep -v ^#); \
do echo -e -n "\\x$$c"; \
done; \
done > $@
cbfs-files-y += spd.bin
spd.bin-file := $(SPD_BIN)
spd.bin-position := $(CONFIG_SPD_LOC)
spd.bin-type := spd

2
src/mainboard/intel/icelake_rvp/spd/Makefile.inc
View File

@@ -2,8 +2,6 @@
romstage-y += spd_util.c
SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = empty # 0b000
SPD_SOURCES += samsung_K4F6E304HBMGCJ # 1b001
SPD_SOURCES += empty # 2b010

2
src/mainboard/intel/jasperlake_rvp/spd/Makefile.inc
View File

@@ -1,5 +1,3 @@
## SPDX-License-Identifier: GPL-2.0-only
SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = jslrvp # 0b000

2
src/mainboard/intel/kblrvp/spd/Makefile.inc
View File

@@ -2,8 +2,6 @@
romstage-y += spd_util.c
SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = rvp3 # 0b000 Dual Channel 4GB
SPD_SOURCES += empty # 0b001
SPD_SOURCES += empty # 0b010

1
src/mainboard/intel/kunimitsu/Kconfig
View File

@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_LPC_TPM
select SOC_INTEL_SKYLAKE
select GENERIC_SPD_BIN
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES

17
src/mainboard/intel/kunimitsu/spd/Makefile.inc
View File

@@ -2,8 +2,6 @@
romstage-y += spd_util.c
SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866 # 0b0000 Dual Channel 4GB
SPD_SOURCES += hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866 # 0b0001 Single Channel 2GB
SPD_SOURCES += samsung_dimm_K4E8E304EE-EGCF-1G-1866 # 0b0010 Dual Channel 4GB
@@ -20,18 +18,3 @@ SPD_SOURCES += empty # 0b1100
SPD_SOURCES += empty # 0b1101
SPD_SOURCES += empty # 0b1110
SPD_SOURCES += empty # 0b1111
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
# Include spd ROM data
$(SPD_BIN): $(SPD_DEPS)
for f in $+; \
do for c in $$(cat $$f | grep -v ^#); \
do printf $$(printf '\\%o' 0x$$c); \
done; \
done > $@
cbfs-files-y += spd.bin
spd.bin-file := $(SPD_BIN)
spd.bin-type := spd

1
src/mainboard/intel/tglrvp/Kconfig
View File

@@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVERS_INTEL_ISH
select EC_ACPI
select PCIEXP_HOTPLUG
select GENERIC_SPD_BIN
config CHROMEOS
bool

16
src/mainboard/intel/tglrvp/spd/Makefile.inc
View File

@@ -1,21 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-only
SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = Micron-MT53D1G64D8SQ-046
SPD_SOURCES += Samsung-K4UBE3D4AA-MGCL
SPD_SOURCES += Hynix-H9HKNNNEBMAV-4267
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
# Include spd ROM data
$(SPD_BIN): $(SPD_DEPS)
for f in $+; \
do for c in $$(cat $$f | grep -v ^#); \
do printf $$(printf '\%o' 0x$$c); \
done; \
done > $@
cbfs-files-y += spd.bin
spd.bin-file := $(SPD_BIN)
spd.bin-type := spd