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southbridge/intel/bd82x6x: Use common gpio.c

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Use shared gpio code from common folder.
Bd82x6x's gpio.c and gpio.h is used by other southbridges
as well and will be removed once it is unused.

Change-Id: I8bd981c4696c174152cf41caefa6c083650d283a
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/13614
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Patrick Rudolph
2016-02-06 17:42:42 +01:00
committed by Stefan Reinauer
parent ffc31d07f7
commit e8e66f4763
46 changed files with 87 additions and 219 deletions
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25
src/mainboard/intel/emeraldlake2/chromeos.c
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@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
#ifndef __PRE_RAM__
#include <boot/coreboot_tables.h>
@@ -81,30 +82,12 @@ void fill_lb_gpios(struct lb_gpios *gpios)
int get_developer_mode_switch(void)
{
device_t dev;
#ifdef __PRE_RAM__
dev = PCI_DEV(0, 0x1f, 0);
#else
dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
#endif
u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
u32 gp_lvl2 = inl(gpio_base + 0x38);
/* Developer: GPIO17, active high */
return (gp_lvl2 >> (57-32)) & 1;
/* Developer: GPIO57, active high */
return get_gpio(57);
}
int get_recovery_mode_switch(void)
{
device_t dev;
#ifdef __PRE_RAM__
dev = PCI_DEV(0, 0x1f, 0);
#else
dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
#endif
u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
u32 gp_lvl = inl(gpio_base + 0x0c);
/* Recovery: GPIO22, active low */
return !((gp_lvl >> 22) & 1);
return !get_gpio(22);
}