From e9172a14f98805e06908519f9ccd53585587a463 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 17 Mar 2022 21:11:31 +0100 Subject: [PATCH] mb/google/guybrush/port_descriptors: use enum values for link speed Use GEN3 from enum dxio_link_speed_cap instead of the number 3. TEST=Timeless build results in identical firmware image for guybrush Signed-off-by: Felix Held Change-Id: I0dddc57e05ec2395ca980bb63320bb9ee5242c29 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62908 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Karthik Ramasubramanian Reviewed-by: Raul Rangel --- src/mainboard/google/guybrush/port_descriptors.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index 158a802322..040298b92d 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -14,7 +14,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 0, .end_logical_lane = 0, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(WLAN_DEVFN), .function_number = PCI_FUNC(WLAN_DEVFN), .link_aspm = ASPM_L1, @@ -29,7 +29,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 1, .end_logical_lane = 1, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_aspm = ASPM_L1, @@ -45,7 +45,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 2, .end_logical_lane = 2, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(WWAN_DEVFN), .function_number = PCI_FUNC(WWAN_DEVFN), .link_aspm = ASPM_L1, @@ -60,7 +60,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 4, .end_logical_lane = 7, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(NVME_DEVFN), .function_number = PCI_FUNC(NVME_DEVFN), .link_aspm = ASPM_L1,