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treewide: Remove "ERROR: "/"WARN: " prefixes from log messages

Browse Source 
Now that the console system itself will clearly differentiate loglevels,
it is no longer necessary to explicitly add "ERROR: " in front of every
BIOS_ERR message to help it stand out more (and allow automated tooling
to grep for it). Removing all these extra .rodata characters should save
us a nice little amount of binary size.

This patch was created by running

  find src/ -type f -exec perl -0777 -pi -e 's/printk\(\s*BIOS_ERR,\s*"ERROR: /printk\(BIOS_ERR, "/gi' '{}' ';'

and doing some cursory review/cleanup on the result. Then doing the same
thing for BIOS_WARN with

  's/printk\(\s*BIOS_WARNING,\s*"WARN(ING)?: /printk\(BIOS_WARNING, "/gi'

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I3d0573acb23d2df53db6813cb1a5fc31b5357db8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61309
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Lance Zhao
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
This commit is contained in:
Julius Werner
2022-01-21 17:06:20 -08:00
parent 266041f0e6
commit e9665959ed
129 changed files with 306 additions and 330 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/acpi/acpigen.c
View File

@ -1783,7 +1783,7 @@ void acpigen_write_CPPC_package(const struct cppc_config *config)
max = CPPC_MAX_FIELDS_VER_3;
break;
default:
printk(BIOS_ERR, "ERROR: CPPC version %u is not implemented\n",
printk(BIOS_ERR, "CPPC version %u is not implemented\n",
config->version);
return;
}

5
src/arch/arm64/fit_payload.c
View File

@ -52,7 +52,7 @@ static bool decompress_kernel_header(const struct fit_image_node *node)
scratch.raw, sizeof(scratch.raw));
break;
default:
printk(BIOS_ERR, "ERROR: Unsupported compression algorithm!\n");
printk(BIOS_ERR, "Unsupported compression algorithm!\n");
return false;
}
@ -61,8 +61,7 @@ static bool decompress_kernel_header(const struct fit_image_node *node)
die("ERROR: Partial decompression ran over scratchbuf!\n");
if (scratch.header.magic != KERNEL_HEADER_MAGIC) {
printk(BIOS_ERR,
"ERROR: Invalid kernel magic: %#.8x\n != %#.8x\n",
printk(BIOS_ERR, "Invalid kernel magic: %#.8x\n != %#.8x\n",
scratch.header.magic, KERNEL_HEADER_MAGIC);
return false;
}

22
src/arch/x86/acpi_bert_storage.c
View File

@ -127,7 +127,7 @@ static acpi_generic_error_status_t *new_bert_status(void)
status = bert_allocate_storage(sizeof(*status));
if (!status) {
printk(BIOS_ERR, "Error: New BERT error entry would exceed available region\n");
printk(BIOS_ERR, "New BERT error entry would exceed available region\n");
return NULL;
}
@ -159,13 +159,13 @@ static acpi_hest_generic_data_v300_t *new_generic_error_entry(
acpi_hest_generic_data_v300_t *entry;
if (bert_entry_count(status) == GENERIC_ERR_STS_ENTRY_COUNT_MAX) {
printk(BIOS_ERR, "Error: New BERT error would exceed maximum entries\n");
printk(BIOS_ERR, "New BERT error would exceed maximum entries\n");
return NULL;
}
entry = bert_allocate_storage(sizeof(*entry));
if (!entry) {
printk(BIOS_ERR, "Error: New BERT error entry would exceed available region\n");
printk(BIOS_ERR, "New BERT error entry would exceed available region\n");
return NULL;
}
@ -191,7 +191,7 @@ static size_t sizeof_error_section(guid_t *guid)
return sizeof(cper_fw_err_rec_section_t);
/* else if ... sizeof(structures not yet defined) */
printk(BIOS_ERR, "Error: Requested size of unrecognized CPER GUID\n");
printk(BIOS_ERR, "Requested size of unrecognized CPER GUID\n");
return 0;
}
@ -199,7 +199,7 @@ void *new_cper_fw_error_crashlog(acpi_generic_error_status_t *status, size_t cl_
{
void *cl_data = bert_allocate_storage(cl_size);
if (!cl_data) {
printk(BIOS_ERR, "Error: Crashlog entry (size %zu) would exceed available region\n",
printk(BIOS_ERR, "Crashlog entry (size %zu) would exceed available region\n",
cl_size);
return NULL;
}
@ -348,7 +348,7 @@ cper_ia32x64_context_t *new_cper_ia32x64_ctx(
return NULL;
if (cper_ia32x64_proc_num_ctxs(x86err) == I32X64SEC_VALID_CTXNUM_MAX) {
printk(BIOS_ERR, "Error: New IA32X64 %s context entry would exceed max allowable contexts\n",
printk(BIOS_ERR, "New IA32X64 %s context entry would exceed max allowable contexts\n",
ctx_names[type]);
return NULL;
}
@ -356,7 +356,7 @@ cper_ia32x64_context_t *new_cper_ia32x64_ctx(
size = cper_ia32x64_ctx_sz_bytype(type, num);
ctx = bert_allocate_storage(size);
if (!ctx) {
printk(BIOS_ERR, "Error: New IA32X64 %s context entry would exceed available region\n",
printk(BIOS_ERR, "New IA32X64 %s context entry would exceed available region\n",
ctx_names[type]);
return NULL;
}
@ -402,14 +402,14 @@ cper_ia32x64_proc_error_info_t *new_cper_ia32x64_check(
return NULL;
if (cper_ia32x64_proc_num_chks(x86err) == I32X64SEC_VALID_ERRNUM_MAX) {
printk(BIOS_ERR, "Error: New IA32X64 %s check entry would exceed max allowable errors\n",
printk(BIOS_ERR, "New IA32X64 %s check entry would exceed max allowable errors\n",
check_names[type]);
return NULL;
}
check = bert_allocate_storage(sizeof(*check));
if (!check) {
printk(BIOS_ERR, "Error: New IA32X64 %s check entry would exceed available region\n",
printk(BIOS_ERR, "New IA32X64 %s check entry would exceed available region\n",
check_names[type]);
return NULL;
}
@ -518,7 +518,7 @@ acpi_generic_error_status_t *bert_new_event(guid_t *guid)
size += sizeof_error_section(guid);
if (size > bert_storage_remaining()) {
printk(BIOS_ERR, "Error: Not enough BERT region space to add event for type %s\n",
printk(BIOS_ERR, "Not enough BERT region space to add event for type %s\n",
generic_error_name(guid));
return NULL;
}
@ -571,7 +571,7 @@ cper_ia32x64_context_t *cper_new_ia32x64_context_msr(
*/
__weak void bert_reserved_region(void **start, size_t *size)
{
printk(BIOS_ERR, "Error: %s not implemented. BERT region generation disabled\n",
printk(BIOS_ERR, "%s not implemented. BERT region generation disabled\n",
__func__);
*start = NULL;
*size = 0;

11
src/arch/x86/tables.c
View File

@ -36,7 +36,7 @@ static unsigned long write_pirq_table(unsigned long rom_table_end)
// much space it's going to need.
if (new_high_table_pointer > (high_table_pointer
+ MAX_PIRQ_TABLE_SIZE))
printk(BIOS_ERR, "ERROR: Increase PIRQ size.\n");
printk(BIOS_ERR, "Increase PIRQ size.\n");
printk(BIOS_DEBUG, "PIRQ table: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
}
@ -64,7 +64,7 @@ static unsigned long write_mptable(unsigned long rom_table_end)
// much space it's going to need.
if (new_high_table_pointer > (high_table_pointer
+ MAX_MP_TABLE_SIZE))
printk(BIOS_ERR, "ERROR: Increase MP table size.\n");
printk(BIOS_ERR, "Increase MP table size.\n");
printk(BIOS_DEBUG, "MP table: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
@ -102,7 +102,7 @@ static unsigned long write_acpi_table(unsigned long rom_table_end)
new_high_table_pointer = write_acpi_tables(high_table_pointer);
if (new_high_table_pointer > (high_table_pointer
+ max_acpi_size))
printk(BIOS_ERR, "ERROR: Increase ACPI size\n");
printk(BIOS_ERR, "Increase ACPI size\n");
printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
@ -127,8 +127,7 @@ static unsigned long write_acpi_table(unsigned long rom_table_end)
writes longest size available. */
memcpy(low_rsdp, high_rsdp, sizeof(acpi_rsdp_t));
} else {
printk(BIOS_ERR,
"ERROR: Didn't find RSDP in high table.\n");
printk(BIOS_ERR, "Didn't find RSDP in high table.\n");
}
rom_table_end = ALIGN_UP(rom_table_end + sizeof(acpi_rsdp_t), 16);
} else {
@ -159,7 +158,7 @@ static unsigned long write_smbios_table(unsigned long rom_table_end)
if (new_high_table_pointer > (high_table_pointer
+ MAX_SMBIOS_SIZE))
printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n");
printk(BIOS_ERR, "Increase SMBIOS size\n");
printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n",
new_high_table_pointer - high_table_pointer);
} else {

4
src/commonlib/storage/sd_mmc.h
View File

@ -71,7 +71,7 @@ int sd_set_partition(struct storage_media *media,
if (CONFIG(SDHC_TRACE)) \
printk(BIOS_DEBUG, format); \
} while (0)
#define sdhc_error(format...) printk(BIOS_ERR, "ERROR: " format)
#define sdhc_error(format...) printk(BIOS_ERR, format)
/* Card/device debug functions */
#define sd_mmc_debug(format...) \
@ -84,6 +84,6 @@ int sd_set_partition(struct storage_media *media,
if (CONFIG(SD_MMC_TRACE)) \
printk(BIOS_DEBUG, format); \
} while (0)
#define sd_mmc_error(format...) printk(BIOS_ERR, "ERROR: " format)
#define sd_mmc_error(format...) printk(BIOS_ERR, format)
#endif /* __COMMONLIB_STORAGE_SD_MMC_H__ */

2
src/cpu/x86/mtrr/mtrr.c
View File

@ -409,7 +409,7 @@ static void prep_var_mtrr(struct var_mtrr_state *var_state,
resource_t mask;
if (var_state->mtrr_index >= total_mtrrs) {
printk(BIOS_ERR, "ERROR: Not enough MTRRs available! MTRR index is %d with %d MTRRs in total.\n",
printk(BIOS_ERR, "Not enough MTRRs available! MTRR index is %d with %d MTRRs in total.\n",
var_state->mtrr_index, total_mtrrs);
return;
}

2
src/cpu/x86/smm/tseg_region.c
View File

@ -61,7 +61,7 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
void stage_cache_external_region(void **base, size_t *size)
{
if (smm_subregion(SMM_SUBREGION_CACHE, (uintptr_t *)base, size)) {
printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
printk(BIOS_ERR, "No cache SMM subregion.\n");
*base = NULL;
*size = 0;
}

2
src/device/dram/ddr4.c
View File

@ -143,7 +143,7 @@ uint16_t ddr4_speed_mhz_to_reported_mts(uint16_t speed_mhz)
return speed_attr->reported_mts;
}
}
printk(BIOS_ERR, "ERROR: DDR4 speed of %d MHz is out of range\n", speed_mhz);
printk(BIOS_ERR, "DDR4 speed of %d MHz is out of range\n", speed_mhz);
return 0;
}

2
src/device/dram/lpddr4.c
View File

@ -94,6 +94,6 @@ uint16_t lpddr4_speed_mhz_to_reported_mts(uint16_t speed_mhz)
return speed_attr->reported_mts;
}
}
printk(BIOS_ERR, "ERROR: LPDDR4 speed of %d MHz is out of range\n", speed_mhz);
printk(BIOS_ERR, "LPDDR4 speed of %d MHz is out of range\n", speed_mhz);
return 0;
}

2
src/device/oprom/realmode/x86.c
View File

@ -233,7 +233,7 @@ static u8 vbe_get_ctrl_info(vbe_info_block *info)
0x0000, buffer_seg, buffer_adr);
/* If the VBE function completed successfully, 0x0 is returned in AH */
if (X86_AH) {
printk(BIOS_WARNING, "Warning: Error from VGA BIOS in %s\n", __func__);
printk(BIOS_WARNING, "Error from VGA BIOS in %s\n", __func__);
return 1;
}
memcpy(info, buffer, sizeof(vbe_info_block));

7
src/device/pci_device.c
View File

@ -497,7 +497,7 @@ static void pci_store_bridge_resource(const struct device *const dev,
} else {
/* Don't let me think I stored the resource. */
resource->flags &= ~IORESOURCE_STORED;
printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", resource->index);
printk(BIOS_ERR, "invalid resource->index %lx\n", resource->index);
}
}
@ -510,7 +510,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
we can treat it like an empty resource. */
resource->size = 0;
} else {
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not assigned\n",
printk(BIOS_ERR, "%s %02lx %s size: 0x%010llx not assigned\n",
dev_path(dev), resource->index,
resource_type(resource), resource->size);
return;
@ -1617,8 +1617,7 @@ int get_pci_irq_pins(struct device *dev, struct device **parent_bdg)
/* Make sure the swizzle returned valid structures */
if (parent_bdg == NULL) {
printk(BIOS_WARNING,
"Warning: Could not find parent bridge for this device!\n");
printk(BIOS_WARNING, "Could not find parent bridge for this device!\n");
return -2;
}
} else { /* Device is not behind a bridge */

11
src/device/pnp_device.c
View File

@ -126,12 +126,12 @@ static void pnp_set_resource(struct device *dev, struct resource *resource)
if (resource->flags & IORESOURCE_IRQ &&
(resource->index != PNP_IDX_IRQ0) &&
(resource->index != PNP_IDX_IRQ1))
printk(BIOS_WARNING, "WARNING: %s %02lx %s size: "
printk(BIOS_WARNING, "%s %02lx %s size: "
"0x%010llx not assigned in devicetree\n", dev_path(dev),
resource->index, resource_type(resource),
resource->size);
else
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx "
printk(BIOS_ERR, "%s %02lx %s size: 0x%010llx "
"not assigned in devicetree\n", dev_path(dev), resource->index,
resource_type(resource), resource->size);
return;
@ -145,7 +145,7 @@ static void pnp_set_resource(struct device *dev, struct resource *resource)
} else if (resource->flags & IORESOURCE_IRQ) {
pnp_set_irq(dev, resource->index, resource->base);
} else {
printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
printk(BIOS_ERR, "%s %02lx unknown resource type\n",
dev_path(dev), resource->index);
return;
}
@ -213,7 +213,7 @@ static void pnp_get_ioresource(struct device *dev, u8 index, u16 mask)
/* If none of the mask bits is set, the resource would occupy the whole
IO space leading to IO resource conflicts with the other devices */
if (!mask) {
printk(BIOS_ERR, "ERROR: device %s index %d has no mask.\n",
printk(BIOS_ERR, "device %s index %d has no mask.\n",
dev_path(dev), index);
return;
}
@ -241,8 +241,7 @@ static void pnp_get_ioresource(struct device *dev, u8 index, u16 mask)
If there is any zero in between the block of ones, it is ignored
in the calculation of the resource size and limit. */
if (mask != (resource->limit ^ (resource->size - 1)))
printk(BIOS_WARNING,
"WARNING: mask of device %s index %d is wrong.\n",
printk(BIOS_WARNING, "mask of device %s index %d is wrong.\n",
dev_path(dev), index);
}

2
src/drivers/analogix/anx7625/anx7625.c
View File

@ -11,7 +11,7 @@
#include "anx7625.h"
#define ANXERROR(format, ...) \
printk(BIOS_ERR, "ERROR: %s: " format, __func__, ##__VA_ARGS__)
printk(BIOS_ERR, "%s: " format, __func__, ##__VA_ARGS__)
#define ANXINFO(format, ...) \
printk(BIOS_INFO, "%s: " format, __func__, ##__VA_ARGS__)
#define ANXDEBUG(format, ...) \

2
src/drivers/i2c/max98390/max98390.c
View File

@ -73,7 +73,7 @@ static void max98390_fill_ssdt(const struct device *dev)
CONFIG_MAINBOARD_PART_NUMBER);
if (chars >= sizeof(dsm_name))
printk(BIOS_ERR, "ERROR: String too long in %s\n", __func__);
printk(BIOS_ERR, "String too long in %s\n", __func__);
acpi_dp_add_string(dp, "maxim,dsm_param_name", dsm_name);
}

2
src/drivers/i2c/tpm/cr50.c
View File

@ -49,7 +49,7 @@ __weak int tis_plat_irq_status(void)
static int warning_displayed;
if (!warning_displayed) {
printk(BIOS_WARNING, "WARNING: %s() not implemented, wasting 20ms to wait on"
printk(BIOS_WARNING, "%s() not implemented, wasting 20ms to wait on"
" Cr50!\n", __func__);
warning_displayed = 1;
}

4
src/drivers/intel/fsp1_1/fsp_relocate.c
View File

@ -15,14 +15,14 @@ int fsp_relocate(struct prog *fsp_relocd)
void *new_loc = cbfs_cbmem_alloc(prog_name(fsp_relocd),
CBMEM_ID_REFCODE, &size);
if (new_loc == NULL) {
printk(BIOS_ERR, "ERROR: Unable to load FSP into memory.\n");
printk(BIOS_ERR, "Unable to load FSP into memory.\n");
return -1;
}
fih_offset = fsp1_1_relocate((uintptr_t)new_loc, new_loc, size);
if (fih_offset <= 0) {
printk(BIOS_ERR, "ERROR: FSP relocation failure.\n");
printk(BIOS_ERR, "FSP relocation failure.\n");
return -1;
}

6
src/drivers/intel/fsp2_0/memory_init.c
View File

@ -36,7 +36,7 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
mrc_data = fsp_find_nv_storage_data(&mrc_data_size);
if (!mrc_data) {
printk(BIOS_ERR, "ERROR: FSP_NON_VOLATILE_STORAGE_HOB missing!\n");
printk(BIOS_ERR, "FSP_NON_VOLATILE_STORAGE_HOB missing!\n");
return;
}
@ -48,7 +48,7 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
*/
if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data,
mrc_data_size) < 0)
printk(BIOS_ERR, "ERROR: Failed to stash MRC data\n");
printk(BIOS_ERR, "Failed to stash MRC data\n");
}
static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
@ -64,7 +64,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
range_entry_size(&fsp_mem))) {
if (CONFIG(HAVE_ACPI_RESUME)) {
printk(BIOS_ERR, "ERROR: Failed to recover CBMEM in S3 resume.\n");
printk(BIOS_ERR, "Failed to recover CBMEM in S3 resume.\n");
/* Failed S3 resume, reset to come up cleanly */
/* FIXME: A "system" reset is likely enough: */
full_reset();

2
src/drivers/intel/pmc_mux/conn/conn.c
View File

@ -56,7 +56,7 @@ static void conn_write_cbmem_entry(struct device *dev)
info = conn_get_cbmem_buffer();
if (!info || (info->port_count >= total_conn_count)) {
printk(BIOS_ERR, "ERROR: No space for Type-C port info!\n");
printk(BIOS_ERR, "No space for Type-C port info!\n");
return;
}

2
src/drivers/net/atl1e.c
View File

@ -30,7 +30,7 @@ static u8 get_hex_digit(const u8 c)
ret = c - 'a' + 0x0a;
}
if (ret > 0x0f) {
printk(BIOS_ERR, "Error: Invalid hex digit found: "
printk(BIOS_ERR, "Invalid hex digit found: "
"%c - 0x%02x\n", (char)c, c);
ret = 0;
}

7
src/drivers/net/r8168.c
View File

@ -76,7 +76,7 @@ static u8 get_hex_digit(const u8 c)
ret = c - 'a' + 0x0a;
}
if (ret > 0x0f) {
printk(BIOS_ERR, "Error: Invalid hex digit found: "
printk(BIOS_ERR, "Invalid hex digit found: "
"%c - 0x%02x\n", (char)c, c);
ret = 0;
}
@ -94,7 +94,7 @@ static enum cb_err fetch_mac_vpd_key(u8 *macstrbuf, const char *vpd_key)
size_t offset;
if (fmap_locate_area_as_rdev("RO_VPD", &rdev)) {
printk(BIOS_ERR, "Error: Couldn't find RO_VPD region.");
printk(BIOS_ERR, "Couldn't find RO_VPD region.");
return CB_ERR;
}
search_address = rdev_mmap_full(&rdev);
@ -108,8 +108,7 @@ static enum cb_err fetch_mac_vpd_key(u8 *macstrbuf, const char *vpd_key)
search_length);
if (offset == search_length) {
printk(BIOS_ERR,
"Error: Could not locate '%s' in VPD\n", vpd_key);
printk(BIOS_ERR, "Could not locate '%s' in VPD\n", vpd_key);
rdev_munmap(&rdev, search_address);
return CB_ERR;
}

4
src/drivers/pc80/rtc/option.c
View File

@ -100,7 +100,7 @@ static enum cb_err cmos_get_uint_option(unsigned int *dest, const char *name)
}
if (ce->config != 'e' && ce->config != 'h') {
printk(BIOS_ERR, "ERROR: CMOS option '%s' is not of integer type.\n", name);
printk(BIOS_ERR, "CMOS option '%s' is not of integer type.\n", name);
return CB_ERR_ARG;
}
@ -176,7 +176,7 @@ static enum cb_err cmos_set_uint_option(const char *name, unsigned int *value)
}
if (ce->config != 'e' && ce->config != 'h') {
printk(BIOS_ERR, "ERROR: CMOS option '%s' is not of integer type.\n", name);
printk(BIOS_ERR, "CMOS option '%s' is not of integer type.\n", name);
return CB_ERR_ARG;
}

4
src/drivers/spi/tpm/tpm.c
View File

@ -74,7 +74,7 @@ __weak int tis_plat_irq_status(void)
static int warning_displayed;
if (!warning_displayed) {
printk(BIOS_WARNING, "WARNING: %s() not implemented, wasting 10ms to wait on"
printk(BIOS_WARNING, "%s() not implemented, wasting 10ms to wait on"
" Cr50!\n", __func__);
warning_displayed = 1;
}
@ -492,7 +492,7 @@ static void cr50_set_board_cfg(void)
/* The high bit is set, meaning that the Cr50 is already locked on a particular
* value for the register, but not the one we wanted. */
printk(BIOS_ERR,
"ERROR: Current CR50_BOARD_CFG = 0x%08x, does not match desired = 0x%08x\n",
"Current CR50_BOARD_CFG = 0x%08x, does not match desired = 0x%08x\n",
board_cfg_value, CR50_BOARD_CFG_VALUE);
return;
}

16
src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
View File

@ -194,13 +194,13 @@ static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus,
return CB_ERR;
if (!wait_ms(100, !i2c_readb(bus, chip, SN_AUX_CMD_REG, &buf) &&
!(buf & AUX_CMD_SEND))) {
printk(BIOS_ERR, "ERROR: AUX_CMD_SEND not acknowledged\n");
printk(BIOS_ERR, "AUX_CMD_SEND not acknowledged\n");
return CB_ERR;
}
if (i2c_readb(bus, chip, SN_AUX_CMD_STATUS_REG, &buf))
return CB_ERR;
if (buf & (NAT_I2C_FAIL | AUX_SHORT | AUX_DFER | AUX_RPLY_TOUT)) {
printk(BIOS_ERR, "ERROR: AUX command failed, status = %#x\n", buf);
printk(BIOS_ERR, "AUX command failed, status = %#x\n", buf);
return CB_ERR;
}
@ -230,7 +230,7 @@ cb_err_t sn65dsi86_bridge_read_edid(uint8_t bus, uint8_t chip, struct edid *out)
err = sn65dsi86_bridge_aux_request(bus, chip, EDID_I2C_ADDR, EDID_LENGTH,
I2C_RAW_READ_AND_STOP, edid);
if (err) {
printk(BIOS_ERR, "ERROR: Failed to read EDID.\n");
printk(BIOS_ERR, "Failed to read EDID.\n");
return err;
}
@ -249,7 +249,7 @@ cb_err_t sn65dsi86_bridge_read_edid(uint8_t bus, uint8_t chip, struct edid *out)
}
if (decode_edid(edid, edid_size, out) != EDID_CONFORMANT) {
printk(BIOS_ERR, "ERROR: Failed to decode EDID.\n");
printk(BIOS_ERR, "Failed to decode EDID.\n");
return CB_ERR;
}
@ -364,7 +364,7 @@ static void sn65dsi86_bridge_set_dp_clock_range(uint8_t bus, uint8_t chip,
if (dp_rate_idx < ARRAY_SIZE(sn65dsi86_bridge_dp_rate_lut))
i2c_write_field(bus, chip, SN_DATARATE_CONFIG_REG, dp_rate_idx, 8, 5);
else
printk(BIOS_ERR, "ERROR: valid dp rate not found");
printk(BIOS_ERR, "valid dp rate not found");
}
static void sn65dsi86_bridge_set_bridge_active_timing(uint8_t bus,
@ -407,7 +407,7 @@ static void sn65dsi86_bridge_link_training(uint8_t bus, uint8_t chip)
if (!wait_ms(500,
!(i2c_readb(bus, chip, SN_DPPLL_SRC_REG, &buf)) &&
(buf & BIT(7)))) {
printk(BIOS_ERR, "ERROR: PLL lock failure\n");
printk(BIOS_ERR, "PLL lock failure\n");
}
/*
@ -426,14 +426,14 @@ static void sn65dsi86_bridge_link_training(uint8_t bus, uint8_t chip)
if (!wait_ms(500, !(i2c_readb(bus, chip, SN_ML_TX_MODE_REG, &buf)) &&
(buf == NORMAL_MODE || buf == MAIN_LINK_OFF))) {
printk(BIOS_ERR, "ERROR: unexpected link training state: %#x\n", buf);
printk(BIOS_ERR, "unexpected link training state: %#x\n", buf);
return;
}
if (buf == NORMAL_MODE)
return;
}
printk(BIOS_ERR, "ERROR: Link training failed 10 times\n");
printk(BIOS_ERR, "Link training failed 10 times\n");
}
void sn65dsi86_backlight_enable(uint8_t bus, uint8_t chip)

10
src/drivers/vpd/vpd.c
View File

@ -67,7 +67,7 @@ static void init_vpd_rdev(const char *fmap_name, struct region_device *rdev)
/* Try if we can find a google_vpd_info, otherwise read whole VPD. */
if (rdev_readat(rdev, &info, 0, sizeof(info)) != sizeof(info)) {
printk(BIOS_ERR, "ERROR: Failed to read %s header.\n",
printk(BIOS_ERR, "Failed to read %s header.\n",
fmap_name);
goto fail;
}
@ -75,13 +75,13 @@ static void init_vpd_rdev(const char *fmap_name, struct region_device *rdev)
if (memcmp(info.header.magic, VPD_INFO_MAGIC, sizeof(info.header.magic))
== 0) {
if (rdev_chain(rdev, rdev, sizeof(info), info.size)) {
printk(BIOS_ERR, "ERROR: %s info size too large.\n",
printk(BIOS_ERR, "%s info size too large.\n",
fmap_name);
goto fail;
}
} else if (info.header.tlv.type == VPD_TYPE_TERMINATOR ||
info.header.tlv.type == VPD_TYPE_IMPLICIT_TERMINATOR) {
printk(BIOS_WARNING, "WARNING: %s is uninitialized or empty.\n",
printk(BIOS_WARNING, "%s is uninitialized or empty.\n",
fmap_name);
goto fail;
}
@ -151,7 +151,7 @@ static void cbmem_add_cros_vpd(int is_recovery)
if (ro_size) {
if (rdev_readat(&ro_vpd, cbmem->blob, 0, ro_size) != ro_size) {
printk(BIOS_ERR, "ERROR: Couldn't read RO VPD\n");
printk(BIOS_ERR, "Couldn't read RO VPD\n");
cbmem->ro_size = ro_size = 0;
}
timestamp_add_now(TS_END_COPYVPD_RO);
@ -160,7 +160,7 @@ static void cbmem_add_cros_vpd(int is_recovery)
if (rw_size) {
if (rdev_readat(&rw_vpd, cbmem->blob + ro_size, 0, rw_size)
!= rw_size) {
printk(BIOS_ERR, "ERROR: Couldn't read RW VPD\n");
printk(BIOS_ERR, "Couldn't read RW VPD\n");
cbmem->rw_size = rw_size = 0;
}
timestamp_add_now(TS_END_COPYVPD_RW);

10
src/drivers/wifi/generic/acpi.c
View File

@ -212,7 +212,7 @@ static void sar_emit_wrds(const struct sar_profile *sar)
* })
*/
if (sar->revision > MAX_SAR_REVISION) {
printk(BIOS_ERR, "ERROR: Invalid SAR table revision: %d\n", sar->revision);
printk(BIOS_ERR, "Invalid SAR table revision: %d\n", sar->revision);
return;
}
@ -258,12 +258,12 @@ static void sar_emit_ewrd(const struct sar_profile *sar)
* })
*/
if (sar->revision > MAX_SAR_REVISION) {
printk(BIOS_ERR, "ERROR: Invalid SAR table revision: %d\n", sar->revision);
printk(BIOS_ERR, "Invalid SAR table revision: %d\n", sar->revision);
return;
}
if (sar->dsar_set_count == 0) {
printk(BIOS_WARNING, "WARNING: DSAR set count is 0\n");
printk(BIOS_WARNING, "DSAR set count is 0\n");
return;
}
@ -341,7 +341,7 @@ static void sar_emit_wgds(struct geo_profile *wgds)
* })
*/
if (wgds->revision > MAX_GEO_OFFSET_REVISION) {
printk(BIOS_ERR, "ERROR: Invalid WGDS revision: %d\n", wgds->revision);
printk(BIOS_ERR, "Invalid WGDS revision: %d\n", wgds->revision);
return;
}
@ -475,7 +475,7 @@ static void emit_sar_acpi_structures(const struct device *dev)
/* Retrieve the sar limits data */
if (get_wifi_sar_limits(&sar_limits) < 0) {
printk(BIOS_ERR, "ERROR: failed getting SAR limits!\n");
printk(BIOS_ERR, "failed getting SAR limits!\n");
return;
}

2
src/ec/google/chromeec/ec.c
View File

@ -975,7 +975,7 @@ int google_chromeec_vbnv_context(int is_read, uint8_t *data, int len)
retry:
if (google_chromeec_command(&cmd)) {
printk(BIOS_ERR, "ERROR: failed to %s vbnv_ec context: %d\n",
printk(BIOS_ERR, "failed to %s vbnv_ec context: %d\n",
is_read ? "read" : "write", (int)cmd.cmd_code);
mdelay(10); /* just in case */
if (--retries)

2
src/lib/bootmem.c
View File

@ -51,7 +51,7 @@ static uint32_t bootmem_to_lb_tag(const enum bootmem_type tag)
case BM_MEM_TABLE:
return LB_MEM_TABLE;
default:
printk(BIOS_ERR, "ERROR: Unsupported tag %u\n", tag);
printk(BIOS_ERR, "Unsupported tag %u\n", tag);
return LB_MEM_RESERVED;
}
}

2
src/lib/cbfs.c
View File

@ -681,7 +681,7 @@ static void mcache_to_cbmem(const struct cbfs_boot_device *cbd, u32 cbmem_id)
size_t real_size = cbfs_mcache_real_size(cbd->mcache, cbd->mcache_size);
void *cbmem_mcache = cbmem_add(cbmem_id, real_size);
if (!cbmem_mcache) {
printk(BIOS_ERR, "ERROR: Cannot allocate CBMEM mcache %#x (%#zx bytes)!\n",
printk(BIOS_ERR, "Cannot allocate CBMEM mcache %#x (%#zx bytes)!\n",
cbmem_id, real_size);
return;
}

10
src/lib/cbmem_stage_cache.c
View File

@ -13,7 +13,7 @@ void stage_cache_add(int stage_id, const struct prog *stage)
meta = cbmem_add(CBMEM_ID_STAGEx_META + stage_id, sizeof(*meta));
if (meta == NULL) {
printk(BIOS_ERR, "Error: Can't add %x metadata to cbmem\n",
printk(BIOS_ERR, "Can't add %x metadata to cbmem\n",
CBMEM_ID_STAGEx_META + stage_id);
return;
}
@ -23,7 +23,7 @@ void stage_cache_add(int stage_id, const struct prog *stage)
c = cbmem_add(CBMEM_ID_STAGEx_CACHE + stage_id, prog_size(stage));
if (c == NULL) {
printk(BIOS_ERR, "Error: Can't add stage_cache %x to cbmem\n",
printk(BIOS_ERR, "Can't add stage_cache %x to cbmem\n",
CBMEM_ID_STAGEx_CACHE + stage_id);
return;
}
@ -51,7 +51,7 @@ void stage_cache_get_raw(int stage_id, void **base, size_t *size)
e = cbmem_entry_find(CBMEM_ID_STAGEx_RAW + stage_id);
if (e == NULL) {
printk(BIOS_ERR, "Error: Can't find raw %x data in cbmem\n",
printk(BIOS_ERR, "Can't find raw %x data in cbmem\n",
CBMEM_ID_STAGEx_RAW + stage_id);
return;
}
@ -72,7 +72,7 @@ void stage_cache_load_stage(int stage_id, struct prog *stage)
meta = cbmem_find(CBMEM_ID_STAGEx_META + stage_id);
if (meta == NULL) {
printk(BIOS_ERR, "Error: Can't find %x metadata in cbmem\n",
printk(BIOS_ERR, "Can't find %x metadata in cbmem\n",
CBMEM_ID_STAGEx_META + stage_id);
return;
}
@ -80,7 +80,7 @@ void stage_cache_load_stage(int stage_id, struct prog *stage)
e = cbmem_entry_find(CBMEM_ID_STAGEx_CACHE + stage_id);
if (e == NULL) {
printk(BIOS_ERR, "Error: Can't find stage_cache %x in cbmem\n",
printk(BIOS_ERR, "Can't find stage_cache %x in cbmem\n",
CBMEM_ID_STAGEx_CACHE + stage_id);
return;
}

2
src/lib/edid.c
View File

@ -1507,7 +1507,7 @@ int decode_edid(unsigned char *edid, int size, struct edid *out)
printk(BIOS_ERR,
"EDID block does NOT conform to EDID 1.3!\n");
else if (!c.has_name_descriptor || !c.has_range_descriptor)
printk(BIOS_WARNING, "WARNING: EDID block does NOT "
printk(BIOS_WARNING, "EDID block does NOT "
"fully conform to EDID 1.3.\n");
if (c.nonconformant_digital_display)

21
src/lib/fit.c
View File

@ -78,7 +78,7 @@ static struct fit_image_node *find_image(const char *name)
if (!strcmp(image->name, name))
return image;
}
printk(BIOS_ERR, "ERROR: Cannot find image node %s!\n", name);
printk(BIOS_ERR, "Cannot find image node %s!\n", name);
return NULL;
}
@ -413,8 +413,7 @@ static int fit_update_compat(struct fit_config_node *config)
uint32_t fdt_offset = be32_to_cpu(fdt_header->structure_offset);
if (config->fdt->compression != CBFS_COMPRESS_NONE) {
printk(BIOS_ERR,
"ERROR: config %s has a compressed FDT without "
printk(BIOS_ERR, "config %s has a compressed FDT without "
"external compatible property, skipping.\n",
config->name);
return -1;
@ -422,15 +421,13 @@ static int fit_update_compat(struct fit_config_node *config)
/* FDT overlays are not supported in legacy FIT images. */
if (config->overlays.next) {
printk(BIOS_ERR,
"ERROR: config %s has overlay but no compat!\n",
printk(BIOS_ERR, "config %s has overlay but no compat!\n",
config->name);
return -1;
}
if (fdt_find_compat(fdt_blob, fdt_offset, &config->compat)) {
printk(BIOS_ERR,
"ERROR: Can't find compat string in FDT %s "
printk(BIOS_ERR, "Can't find compat string in FDT %s "
"for config %s, skipping.\n",
config->fdt->name, config->name);
return -1;
@ -467,7 +464,7 @@ struct fit_config_node *fit_load(void *fit)
struct device_tree *tree = fdt_unflatten(fit);
if (!tree) {
printk(BIOS_ERR, "ERROR: Failed to unflatten FIT image!\n");
printk(BIOS_ERR, "Failed to unflatten FIT image!\n");
return NULL;
}
@ -494,21 +491,19 @@ struct fit_config_node *fit_load(void *fit)
/* Process and list the configs. */
list_for_each(config, config_nodes, list_node) {
if (!config->kernel) {
printk(BIOS_ERR,
"ERROR: config %s has no kernel, skipping.\n",
printk(BIOS_ERR, "config %s has no kernel, skipping.\n",
config->name);
continue;
}
if (!config->fdt) {
printk(BIOS_ERR,
"ERROR: config %s has no FDT, skipping.\n",
printk(BIOS_ERR, "config %s has no FDT, skipping.\n",
config->name);
continue;
}
if (config->ramdisk &&
config->ramdisk->compression < 0) {
printk(BIOS_WARNING, "WARN: Ramdisk is compressed with "
printk(BIOS_WARNING, "Ramdisk is compressed with "
"an unsupported algorithm, discarding config %s."
"\n", config->name);
continue;

18
src/lib/fit_payload.c
View File

@ -35,7 +35,7 @@ static bool extract(struct region *region, struct fit_image_node *node)
size_t true_size = 0;
if (node->size == 0) {
printk(BIOS_ERR, "ERROR: The %s size is 0\n", node->name);
printk(BIOS_ERR, "The %s size is 0\n", node->name);
return true;
}
@ -50,7 +50,7 @@ static bool extract(struct region *region, struct fit_image_node *node)
comp_name = "Decompressing LZ4";
break;
default:
printk(BIOS_ERR, "ERROR: Unsupported compression\n");
printk(BIOS_ERR, "Unsupported compression\n");
return true;
}
@ -76,7 +76,7 @@ static bool extract(struct region *region, struct fit_image_node *node)
}
if (!true_size) {
printk(BIOS_ERR, "ERROR: %s decompression failed!\n",
printk(BIOS_ERR, "%s decompression failed!\n",
comp_name);
return true;
}
@ -176,13 +176,13 @@ void fit_payload(struct prog *payload, void *data)
struct fit_config_node *config = fit_load(data);
if (!config) {
printk(BIOS_ERR, "ERROR: Could not load FIT\n");
printk(BIOS_ERR, "Could not load FIT\n");
return;
}
dt = unpack_fdt(config->fdt);
if (!dt) {
printk(BIOS_ERR, "ERROR: Failed to unflatten the FDT.\n");
printk(BIOS_ERR, "Failed to unflatten the FDT.\n");
return;
}
@ -190,7 +190,7 @@ void fit_payload(struct prog *payload, void *data)
list_for_each(chain, config->overlays, list_node) {
struct device_tree *overlay = unpack_fdt(chain->overlay);
if (!overlay || dt_apply_overlay(dt, overlay)) {
printk(BIOS_ERR, "ERROR: Failed to apply overlay %s!\n",
printk(BIOS_ERR, "Failed to apply overlay %s!\n",
chain->overlay->name);
}
}
@ -213,7 +213,7 @@ void fit_payload(struct prog *payload, void *data)
/* Invoke arch specific payload placement and fixups */
if (!fit_payload_arch(payload, config, &kernel, &fdt, &initrd)) {
printk(BIOS_ERR, "ERROR: Failed to find free memory region\n");
printk(BIOS_ERR, "Failed to find free memory region\n");
bootmem_dump_ranges();
return;
}
@ -227,7 +227,7 @@ void fit_payload(struct prog *payload, void *data)
if (config->ramdisk &&
extract(&initrd, config->ramdisk)) {
printk(BIOS_ERR, "ERROR: Failed to extract initrd\n");
printk(BIOS_ERR, "Failed to extract initrd\n");
prog_set_entry(payload, NULL, NULL);
return;
}
@ -235,7 +235,7 @@ void fit_payload(struct prog *payload, void *data)
timestamp_add_now(TS_KERNEL_DECOMPRESSION);
if (extract(&kernel, config->kernel)) {
printk(BIOS_ERR, "ERROR: Failed to extract kernel\n");
printk(BIOS_ERR, "Failed to extract kernel\n");
prog_set_entry(payload, NULL, NULL);
return;
}

6
src/lib/fmap.c
View File

@ -80,7 +80,7 @@ static void setup_preram_cache(struct region_device *cache_rdev)
if (!verify_fmap(fmap))
goto register_cache;
printk(BIOS_ERR, "ERROR: FMAP cache corrupted?!\n");
printk(BIOS_ERR, "FMAP cache corrupted?!\n");
if (CONFIG(TOCTOU_SAFETY))
die("TOCTOU safety relies on FMAP cache");
}
@ -301,13 +301,13 @@ static void fmap_setup_cbmem_cache(int unused)
const size_t s = region_device_sz(&fmrd);
struct fmap *fmap = cbmem_add(CBMEM_ID_FMAP, s);
if (!fmap) {
printk(BIOS_ERR, "ERROR: Failed to allocate CBMEM\n");
printk(BIOS_ERR, "Failed to allocate CBMEM\n");
return;
}
const ssize_t ret = rdev_readat(&fmrd, fmap, 0, s);
if (ret != s) {
printk(BIOS_ERR, "ERROR: Failed to read FMAP into CBMEM\n");
printk(BIOS_ERR, "Failed to read FMAP into CBMEM\n");
cbmem_entry_remove(cbmem_entry_find(CBMEM_ID_FMAP));
return;
}

10
src/lib/thread.c
View File

@ -282,15 +282,14 @@ int thread_run(struct thread_handle *handle, enum cb_err (*func)(void *), void *
current = current_thread();
if (!thread_can_yield(current)) {
printk(BIOS_ERR,
"ERROR: %s() called from non-yielding context!\n", __func__);
printk(BIOS_ERR, "%s() called from non-yielding context!\n", __func__);
return -1;
}
t = get_free_thread();
if (t == NULL) {
printk(BIOS_ERR, "ERROR: %s: No more threads!\n", __func__);
printk(BIOS_ERR, "%s: No more threads!\n", __func__);
return -1;
}
@ -317,15 +316,14 @@ int thread_run_until(struct thread_handle *handle, enum cb_err (*func)(void *),
current = current_thread();
if (!thread_can_yield(current)) {
printk(BIOS_ERR,
"ERROR: %s() called from non-yielding context!\n", __func__);
printk(BIOS_ERR, "%s() called from non-yielding context!\n", __func__);
return -1;
}
t = get_free_thread();
if (t == NULL) {
printk(BIOS_ERR, "ERROR: %s: No more threads!\n", __func__);
printk(BIOS_ERR, "%s: No more threads!\n", __func__);
return -1;
}

12
src/lib/timestamp.c
View File

@ -114,7 +114,7 @@ static void timestamp_add_table_entry(struct timestamp_table *ts_table,
tse->entry_stamp = ts_time;
if (ts_table->num_entries == ts_table->max_entries)
printk(BIOS_ERR, "ERROR: Timestamp table full\n");
printk(BIOS_ERR, "Timestamp table full\n");
}
void timestamp_add(enum timestamp_id id, int64_t ts_time)
@ -127,7 +127,7 @@ void timestamp_add(enum timestamp_id id, int64_t ts_time)
ts_table = timestamp_table_get();
if (!ts_table) {
printk(BIOS_ERR, "ERROR: No timestamp table found\n");
printk(BIOS_ERR, "No timestamp table found\n");
return;
}
@ -155,7 +155,7 @@ void timestamp_init(uint64_t base)
ts_cache = timestamp_cache_get();
if (!ts_cache) {
printk(BIOS_ERR, "ERROR: No timestamp cache to init\n");
printk(BIOS_ERR, "No timestamp cache to init\n");
return;
}
@ -170,7 +170,7 @@ static void timestamp_sync_cache_to_cbmem(struct timestamp_table *ts_cbmem_table
ts_cache_table = timestamp_table_get();
if (!ts_cache_table) {
printk(BIOS_ERR, "ERROR: No timestamp cache found\n");
printk(BIOS_ERR, "No timestamp cache found\n");
return;
}
@ -223,7 +223,7 @@ static void timestamp_reinit(int is_recovery)
}
if (ts_cbmem_table == NULL) {
printk(BIOS_ERR, "ERROR: No timestamp table allocated\n");
printk(BIOS_ERR, "No timestamp table allocated\n");
timestamp_table_set(NULL);
return;
}
@ -253,7 +253,7 @@ void timestamp_rescale_table(uint16_t N, uint16_t M)
/* No timestamp table found */
if (ts_table == NULL) {
printk(BIOS_ERR, "ERROR: No timestamp table found\n");
printk(BIOS_ERR, "No timestamp table found\n");
return;
}

4
src/mainboard/google/gru/mainboard.c
View File

@ -247,12 +247,12 @@ static void configure_display(void)
static void usb_power_cycle(int port)
{
if (google_chromeec_set_usb_pd_role(port, USB_PD_CTRL_ROLE_FORCE_SINK))
printk(BIOS_ERR, "ERROR: Cannot force USB%d PD sink\n", port);
printk(BIOS_ERR, "Cannot force USB%d PD sink\n", port);
mdelay(10); /* Make sure USB stick is fully depowered. */
if (google_chromeec_set_usb_pd_role(port, USB_PD_CTRL_ROLE_TOGGLE_ON))
printk(BIOS_ERR, "ERROR: Cannot restore USB%d PD mode\n", port);
printk(BIOS_ERR, "Cannot restore USB%d PD mode\n", port);
}
static void setup_usb(int port)

2
src/mainboard/google/kahlee/OemCustomize.c
View File

@ -67,7 +67,7 @@ void set_board_env_params(GNB_ENV_CONFIGURATION *params)
const struct soc_amd_stoneyridge_config *cfg;
const struct device *dev = pcidev_path_on_root(GNB_DEVFN);
if (!dev || !dev->chip_info) {
printk(BIOS_WARNING, "Warning: Cannot find SoC devicetree config\n");
printk(BIOS_WARNING, "Cannot find SoC devicetree config\n");
return;
}
cfg = dev->chip_info;

4
src/mainboard/google/kahlee/variants/baseboard/memory.c
View File

@ -29,12 +29,12 @@ int __weak variant_mainboard_read_spd(uint8_t spdAddress,
void *spd = (void *)spd_cbfs_map(spd_index);
if (!spd) {
printk(BIOS_ERR, "Error: spd.bin not found\n");
printk(BIOS_ERR, "spd.bin not found\n");
return -1;
}
if (len != CONFIG_DIMM_SPD_SIZE) {
printk(BIOS_ERR, "Error: spd.bin is not the correct size\n");
printk(BIOS_ERR, "spd.bin is not the correct size\n");
return -1;
}

2
src/mainboard/google/octopus/romstage.c
View File

@ -34,7 +34,7 @@ void mainboard_save_dimm_info(void)
if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0],
ARRAY_SIZE(part_num_store)) < 0)
printk(BIOS_ERR, "ERROR: Couldn't obtain DRAM part number from CBI\n");
printk(BIOS_ERR, "Couldn't obtain DRAM part number from CBI\n");
else
part_num = &part_num_store[0];

2
src/mainboard/intel/harcuvar/romstage.c
View File

@ -88,7 +88,7 @@ void mainboard_config_gpios(void)
}
if ((!table) || (!num)) {
printk(BIOS_ERR, "ERROR: No valid GPIO table found!\n");
printk(BIOS_ERR, "No valid GPIO table found!\n");
return;
}

2
src/mainboard/scaleway/tagada/romstage.c
View File

@ -25,7 +25,7 @@ void mainboard_config_gpios(void)
num = ARRAY_SIZE(tagada_gpio_config);
if ((!table) || (!num)) {
printk(BIOS_ERR, "ERROR: No valid GPIO table found!\n");
printk(BIOS_ERR, "No valid GPIO table found!\n");
return;
}

2
src/northbridge/amd/agesa/family14/northbridge.c
View File

@ -625,7 +625,7 @@ static void cpu_bus_scan(struct device *dev)
/* There is only one node for fam14, but there may be multiple cores. */
cpu = pcidev_on_root(0x18, 0);
if (!cpu)
printk(BIOS_ERR, "ERROR: %02x:%02x.0 not found", 0, 0x18);
printk(BIOS_ERR, "%02x:%02x.0 not found", 0, 0x18);
cores_found = (pci_read_config32(pcidev_on_root(0x18, 0x3),
0xe8) >> 12) & 3;

3
src/northbridge/intel/gm45/raminit.c
View File

@ -195,8 +195,7 @@ void enter_raminit_or_reset(void)
if (reg8 & (1 << 2)) { /* S4-assertion-width violation */
/* Ignore S4-assertion-width violation like original BIOS. */
printk(BIOS_WARNING,
"WARNING: Ignoring S4-assertion-width violation.\n");
printk(BIOS_WARNING, "Ignoring S4-assertion-width violation.\n");
/* Bit2 is R/WC, so it will clear itself below. */
}

4
src/northbridge/intel/i945/gma.c
View File

@ -328,7 +328,7 @@ static int intel_gma_init_lvds(struct northbridge_intel_i945_config *conf,
write32(mmiobase + EIR, 0xffffffff);
if (gtt_setup(mmiobase)) {
printk(BIOS_ERR, "ERROR: GTT Setup Failed!!!\n");
printk(BIOS_ERR, "GTT Setup Failed!!!\n");
return 0;
}
@ -352,7 +352,7 @@ static int intel_gma_init_lvds(struct northbridge_intel_i945_config *conf,
if (temp & 1)
printk(BIOS_INFO, "GTT Enabled\n");
else
printk(BIOS_ERR, "ERROR: GTT is still Disabled!!!\n");
printk(BIOS_ERR, "GTT is still Disabled!!!\n");
if (CONFIG(LINEAR_FRAMEBUFFER)) {
printk(BIOS_SPEW, "memset %p to 0x00 for %d bytes\n",

2
src/northbridge/intel/sandybridge/common.c
View File

@ -9,7 +9,7 @@ enum platform_type get_platform_type(void)
{
const int id = get_platform_id();
if (id != 1 && id != 4)
printk(BIOS_WARNING, "WARN: Unknown platform id 0x%x\n", id);
printk(BIOS_WARNING, "Unknown platform id 0x%x\n", id);
return (id == 4) ? PLATFORM_MOBILE : PLATFORM_DESKTOP_SERVER;
}

2
src/security/tpm/tss/tcg-2.0/tss_marshaling.c
View File

@ -680,7 +680,7 @@ struct tpm2_response *tpm_unmarshal_response(TPM_CC command, struct ibuf *ib)
return NULL;
}
if (rc)
printk(BIOS_WARNING, "Warning: %s had one or more failures.\n",
printk(BIOS_WARNING, "%s had one or more failures.\n",
__func__);
/* The entire message have been parsed. */

5
src/soc/amd/cezanne/data_fabric.c
View File

@ -66,8 +66,7 @@ void data_fabric_set_mmio_np(void)
/* Although a pair could be freed later, this condition is
* very unusual and deserves analysis. Flag an error and
* leave the topmost part unconfigured. */
printk(BIOS_ERR,
"Error: Not enough NB MMIO routing registers\n");
printk(BIOS_ERR, "Not enough NB MMIO routing registers\n");
continue;
}
data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), np_top + 1);
@ -85,7 +84,7 @@ void data_fabric_set_mmio_np(void)
reg = data_fabric_find_unused_mmio_reg();
if (reg < 0) {
printk(BIOS_ERR, "Error: cannot configure region as NP\n");
printk(BIOS_ERR, "cannot configure region as NP\n");
return;
}

2
src/soc/amd/cezanne/i2c.c
View File

@ -24,7 +24,7 @@ static struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
void i2c_set_bar(unsigned int bus, uintptr_t bar)
{
if (bus >= ARRAY_SIZE(i2c_ctrlr)) {
printk(BIOS_ERR, "Error: i2c index out of bounds: %u.", bus);
printk(BIOS_ERR, "i2c index out of bounds: %u.", bus);
return;
}

4
src/soc/amd/cezanne/root_complex.c
View File

@ -141,7 +141,7 @@ static void read_resources(struct device *dev)
mmconf_resource(dev, MMIO_CONF_BASE);
if (!hob) {
printk(BIOS_ERR, "Error: %s incomplete because no HOB list was found\n",
printk(BIOS_ERR, "%s incomplete because no HOB list was found\n",
__func__);
return;
}
@ -163,7 +163,7 @@ static void read_resources(struct device *dev)
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource(dev, idx++, res->addr / KiB, res->length / KiB);
else
printk(BIOS_ERR, "Error: failed to set resources for type %d\n",
printk(BIOS_ERR, "failed to set resources for type %d\n",
res->type);
}

2
src/soc/amd/cezanne/smihandler.c
View File

@ -121,7 +121,7 @@ static void fch_slp_typ_handler(void)
psp_notify_sx_info(ACPI_S3);
smu_sx_entry(); /* Leave SlpTypeEn clear, SMU will set */
printk(BIOS_ERR, "Error: System did not go to sleep\n");
printk(BIOS_ERR, "System did not go to sleep\n");
hlt();
}
}

2
src/soc/amd/common/block/acpi/bert.c
View File

@ -17,7 +17,7 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
bert_errors_region(region, length);
if (!*region) {
printk(BIOS_ERR, "Error: Can't find BERT storage area\n");
printk(BIOS_ERR, "Can't find BERT storage area\n");
return CB_ERR;
}

8
src/soc/amd/common/block/acpi/gpio.c
View File

@ -7,13 +7,13 @@
static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
{
if (gpio_num >= SOC_GPIO_TOTAL_PINS) {
printk(BIOS_WARNING, "Warning: Pin %d should be smaller than"
printk(BIOS_WARNING, "Pin %d should be smaller than"
" %d\n", gpio_num, SOC_GPIO_TOTAL_PINS);
return -1;
}
if (SOC_GPIO_TOTAL_PINS >= AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER &&
gpio_num >= SOC_GPIO_TOTAL_PINS) {
printk(BIOS_WARNING, "Warning: Pin %d is a remote GPIO which isn't supported"
printk(BIOS_WARNING, "Pin %d is a remote GPIO which isn't supported"
" yet.\n", gpio_num);
return -1;
}
@ -26,13 +26,13 @@ static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num)
{
if (gpio_num >= SOC_GPIO_TOTAL_PINS) {
printk(BIOS_WARNING, "Warning: Pin %d should be smaller than"
printk(BIOS_WARNING, "Pin %d should be smaller than"
" %d\n", gpio_num, SOC_GPIO_TOTAL_PINS);
return -1;
}
if (SOC_GPIO_TOTAL_PINS >= AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER &&
gpio_num >= SOC_GPIO_TOTAL_PINS) {
printk(BIOS_WARNING, "Warning: Pin %d is a remote GPIO which isn't supported"
printk(BIOS_WARNING, "Pin %d is a remote GPIO which isn't supported"
" yet.\n", gpio_num);
return -1;
}

8
src/soc/amd/common/block/apob/apob_cache.c
View File

@ -67,7 +67,7 @@ static void *get_apob_dram_address(void)
static int get_nv_rdev(struct region_device *r)
{
if (fmap_locate_area_as_rdev(DEFAULT_MRC_CACHE, r) < 0) {
printk(BIOS_ERR, "Error: No APOB NV region is found in flash\n");
printk(BIOS_ERR, "No APOB NV region is found in flash\n");
return -1;
}
@ -180,7 +180,7 @@ static void soc_update_apob_cache(void *unused)
region_device_offset(&read_rdev), region_device_sz(&read_rdev));
if (fmap_locate_area_as_rdev_rw(DEFAULT_MRC_CACHE, &write_rdev) < 0) {
printk(BIOS_ERR, "Error: No RW APOB NV region is found in flash\n");
printk(BIOS_ERR, "No RW APOB NV region is found in flash\n");
return;
}
@ -188,14 +188,14 @@ static void soc_update_apob_cache(void *unused)
/* write data to flash region */
if (rdev_eraseat(&write_rdev, 0, DEFAULT_MRC_CACHE_SIZE) < 0) {
printk(BIOS_ERR, "Error: APOB flash region erase failed\n");
printk(BIOS_ERR, "APOB flash region erase failed\n");
return;
}
timestamp_add_now(TS_AMD_APOB_WRITE_START);
if (rdev_writeat(&write_rdev, apob_src_ram, 0, apob_src_ram->size) < 0) {
printk(BIOS_ERR, "Error: APOB flash region update failed\n");
printk(BIOS_ERR, "APOB flash region update failed\n");
return;
}

2
src/soc/amd/common/block/cpu/mca/mca_bert.c
View File

@ -91,5 +91,5 @@ void build_bert_mca_error(struct mca_bank_status *mci)
failed:
/* We're here because of a hardware error, don't break something else */
printk(BIOS_ERR, "Error: Not enough room in BERT region for Machine Check error\n");
printk(BIOS_ERR, "Not enough room in BERT region for Machine Check error\n");
}

2
src/soc/amd/common/block/cpu/mca/mcax_bert.c
View File

@ -91,5 +91,5 @@ void build_bert_mca_error(struct mca_bank_status *mci)
failed:
/* We're here because of a hardware error, don't break something else */
printk(BIOS_ERR, "Error: Not enough room in BERT region for Machine Check error\n");
printk(BIOS_ERR, "Not enough room in BERT region for Machine Check error\n");
}

2
src/soc/amd/common/block/cpu/noncar/memmap.c
View File

@ -47,7 +47,7 @@ void smm_region(uintptr_t *start, size_t *size)
status = fsp_find_range_hob(&tseg, AMD_FSP_TSEG_HOB_GUID.b);
if (status < 0) {
printk(BIOS_ERR, "Error: unable to find TSEG HOB\n");
printk(BIOS_ERR, "unable to find TSEG HOB\n");
return;
}

2
src/soc/amd/common/block/cpu/smm/smm_helper.c
View File

@ -19,7 +19,7 @@ void clear_tvalid(void)
if (!tvalid) /* not valid but locked means still accessible */
return;
printk(BIOS_ERR, "Error: can't clear TValid, already locked\n");
printk(BIOS_ERR, "can't clear TValid, already locked\n");
return;
}

4
src/soc/amd/common/block/gpio/gpio.c
View File

@ -85,7 +85,7 @@ static void program_smi(uint32_t flags, unsigned int gevent_num)
uint8_t level;
if (!is_gpio_event_level_triggered(flags)) {
printk(BIOS_ERR, "ERROR: %s - Only level trigger allowed for SMI!\n", __func__);
printk(BIOS_ERR, "%s - Only level trigger allowed for SMI!\n", __func__);
BUG();
return;
}
@ -247,7 +247,7 @@ static void set_single_gpio(const struct soc_amd_gpio *g)
gevent_num = get_gpio_gevent(g->gpio, gev_tbl, gev_items);
if (gevent_num < 0) {
printk(BIOS_WARNING, "Warning: GPIO pin %d has no associated gevent!\n",
printk(BIOS_WARNING, "GPIO pin %d has no associated gevent!\n",
g->gpio);
return;
}

45
src/soc/amd/common/block/lpc/espi_util.c
View File

@ -187,7 +187,7 @@ static enum cb_err espi_open_generic_io_window(uint16_t base, size_t size)
if (idx == -1) {
printk(BIOS_ERR, "Cannot open IO window base %x size %zx\n", base,
size);
printk(BIOS_ERR, "ERROR: No more available IO windows!\n");
printk(BIOS_ERR, "No more available IO windows!\n");
return CB_ERR;
}
@ -279,7 +279,7 @@ enum cb_err espi_open_mmio_window(uint32_t base, size_t size)
if (idx == -1) {
printk(BIOS_ERR, "Cannot open IO window base %x size %zx\n", base,
size);
printk(BIOS_ERR, "ERROR: No more available MMIO windows!\n");
printk(BIOS_ERR, "No more available MMIO windows!\n");
return CB_ERR;
}
@ -418,7 +418,7 @@ static enum cb_err espi_poll_status(uint32_t *status)
return CB_SUCCESS;
} while (!stopwatch_expired(&sw));
printk(BIOS_ERR, "Error: eSPI timed out waiting for status update.\n");
printk(BIOS_ERR, "eSPI timed out waiting for status update.\n");
return CB_ERR;
}
@ -609,7 +609,7 @@ static void espi_set_io_mode_config(enum espi_io_mode mb_io_mode, uint32_t slave
*ctrlr_config |= ESPI_IO_MODE_QUAD;
break;
}
printk(BIOS_ERR, "Error: eSPI Quad I/O not supported. Dropping to dual mode.\n");
printk(BIOS_ERR, "eSPI Quad I/O not supported. Dropping to dual mode.\n");
/* Intentional fall-through */
case ESPI_IO_MODE_DUAL:
if (espi_slave_supports_dual_io(slave_caps)) {
@ -617,8 +617,7 @@ static void espi_set_io_mode_config(enum espi_io_mode mb_io_mode, uint32_t slave
*ctrlr_config |= ESPI_IO_MODE_DUAL;
break;
}
printk(BIOS_ERR,
"Error: eSPI Dual I/O not supported. Dropping to single mode.\n");
printk(BIOS_ERR, "eSPI Dual I/O not supported. Dropping to single mode.\n");
/* Intentional fall-through */
case ESPI_IO_MODE_SINGLE:
/* Single I/O mode is always supported. */
@ -642,7 +641,7 @@ static void espi_set_op_freq_config(enum espi_op_freq mb_op_freq, uint32_t slave
*ctrlr_config |= ESPI_OP_FREQ_66_MHZ;
break;
}
printk(BIOS_ERR, "Error: eSPI 66MHz not supported. Dropping to 33MHz.\n");
printk(BIOS_ERR, "eSPI 66MHz not supported. Dropping to 33MHz.\n");
/* Intentional fall-through */
case ESPI_OP_FREQ_33_MHZ:
if (slave_max_speed_mhz >= 33) {
@ -650,7 +649,7 @@ static void espi_set_op_freq_config(enum espi_op_freq mb_op_freq, uint32_t slave
*ctrlr_config |= ESPI_OP_FREQ_33_MHZ;
break;
}
printk(BIOS_ERR, "Error: eSPI 33MHz not supported. Dropping to 16MHz.\n");
printk(BIOS_ERR, "eSPI 33MHz not supported. Dropping to 16MHz.\n");
/* Intentional fall-through */
case ESPI_OP_FREQ_16_MHZ:
/*
@ -732,7 +731,7 @@ static enum cb_err espi_wait_channel_ready(uint16_t slave_reg_addr)
return CB_SUCCESS;
} while (!stopwatch_expired(&sw));
printk(BIOS_ERR, "Error: Channel is not ready after %d usec (slave addr: 0x%x)\n",
printk(BIOS_ERR, "Channel is not ready after %d usec (slave addr: 0x%x)\n",
ESPI_CH_READY_TIMEOUT_US, slave_reg_addr);
return CB_ERR;
@ -777,7 +776,7 @@ static enum cb_err espi_setup_vw_channel(const struct espi_config *mb_cfg, uint3
return CB_SUCCESS;
if (!espi_slave_supports_vw_channel(slave_caps)) {
printk(BIOS_ERR, "Error: eSPI slave doesn't support VW channel!\n");
printk(BIOS_ERR, "eSPI slave doesn't support VW channel!\n");
return CB_ERR;
}
@ -812,7 +811,7 @@ static enum cb_err espi_setup_periph_channel(const struct espi_config *mb_cfg,
*/
if (mb_cfg->periph_ch_en) {
if (!espi_slave_supports_periph_channel(slave_caps)) {
printk(BIOS_ERR, "Error: eSPI slave doesn't support periph channel!\n");
printk(BIOS_ERR, "eSPI slave doesn't support periph channel!\n");
return CB_ERR;
}
slave_config |= slave_en_mask;
@ -834,7 +833,7 @@ static enum cb_err espi_setup_oob_channel(const struct espi_config *mb_cfg, uint
return CB_SUCCESS;
if (!espi_slave_supports_oob_channel(slave_caps)) {
printk(BIOS_ERR, "Error: eSPI slave doesn't support OOB channel!\n");
printk(BIOS_ERR, "eSPI slave doesn't support OOB channel!\n");
return CB_ERR;
}
@ -856,7 +855,7 @@ static enum cb_err espi_setup_flash_channel(const struct espi_config *mb_cfg,
return CB_SUCCESS;
if (!espi_slave_supports_flash_channel(slave_caps)) {
printk(BIOS_ERR, "Error: eSPI slave doesn't support flash channel!\n");
printk(BIOS_ERR, "eSPI slave doesn't support flash channel!\n");
return CB_ERR;
}
@ -928,7 +927,7 @@ enum cb_err espi_setup(void)
* The resets affects both host and slave devices, so set initial config again.
*/
if (espi_send_reset() != CB_SUCCESS) {
printk(BIOS_ERR, "Error: In-band reset failed!\n");
printk(BIOS_ERR, "In-band reset failed!\n");
return CB_ERR;
}
espi_set_initial_config(cfg);
@ -938,7 +937,7 @@ enum cb_err espi_setup(void)
* Get configuration of slave device.
*/
if (espi_get_general_configuration(&slave_caps) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Slave GET_CONFIGURATION failed!\n");
printk(BIOS_ERR, "Slave GET_CONFIGURATION failed!\n");
return CB_ERR;
}
@ -948,7 +947,7 @@ enum cb_err espi_setup(void)
* Step 5: Set host slave config
*/
if (espi_set_general_configuration(cfg, slave_caps) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Slave SET_CONFIGURATION failed!\n");
printk(BIOS_ERR, "Slave SET_CONFIGURATION failed!\n");
return CB_ERR;
}
@ -964,39 +963,39 @@ enum cb_err espi_setup(void)
*/
/* Set up VW first so we can deassert PLTRST#. */
if (espi_setup_vw_channel(cfg, slave_caps) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Setup VW channel failed!\n");
printk(BIOS_ERR, "Setup VW channel failed!\n");
return CB_ERR;
}
/* Assert PLTRST# if VW channel is enabled by mainboard. */
if (espi_send_pltrst(cfg, true) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: PLTRST# assertion failed!\n");
printk(BIOS_ERR, "PLTRST# assertion failed!\n");
return CB_ERR;
}
/* De-assert PLTRST# if VW channel is enabled by mainboard. */
if (espi_send_pltrst(cfg, false) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: PLTRST# deassertion failed!\n");
printk(BIOS_ERR, "PLTRST# deassertion failed!\n");
return CB_ERR;
}
if (espi_setup_periph_channel(cfg, slave_caps) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Setup Periph channel failed!\n");
printk(BIOS_ERR, "Setup Periph channel failed!\n");
return CB_ERR;
}
if (espi_setup_oob_channel(cfg, slave_caps) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Setup OOB channel failed!\n");
printk(BIOS_ERR, "Setup OOB channel failed!\n");
return CB_ERR;
}
if (espi_setup_flash_channel(cfg, slave_caps) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Setup Flash channel failed!\n");
printk(BIOS_ERR, "Setup Flash channel failed!\n");
return CB_ERR;
}
if (espi_configure_decodes(cfg) != CB_SUCCESS) {
printk(BIOS_ERR, "Error: Configuring decodes failed!\n");
printk(BIOS_ERR, "Configuring decodes failed!\n");
return CB_ERR;
}

3
src/soc/amd/common/block/lpc/spi_dma.c
View File

@ -147,8 +147,7 @@ static bool continue_spi_dma_transaction(const struct region_device *rd,
thread_mutex_unlock(&spi_hw_mutex);
if (spi_dma_has_error()) {
printk(BIOS_ERR,
"ERROR: SPI DMA failure: dest: %p, source: %#zx, size: %zu\n",
printk(BIOS_ERR, "SPI DMA failure: dest: %p, source: %#zx, size: %zu\n",
transaction->destination, transaction->source,
transaction->transfer_size);
return false;

2
src/soc/amd/common/block/pci/amd_pci_util.c
View File

@ -97,7 +97,7 @@ void write_pci_cfg_irqs(void)
idx_name = sb_get_apic_reg_association(&limit);
if (pirq_data_ptr == NULL) {
printk(BIOS_WARNING, "Warning: Can't write PCI IRQ assignments"
printk(BIOS_WARNING, "Can't write PCI IRQ assignments"
" because 'mainboard_pirq_data' structure does"
" not exist\n");
return;

2
src/soc/amd/common/block/pm/pmlib.c
View File

@ -31,7 +31,7 @@ void pm_set_power_failure_state(void)
pwr_fail |= PWR_FAIL_PREV;
break;
default:
printk(BIOS_WARNING, "WARNING: Unknown power-failure state: %d\n",
printk(BIOS_WARNING, "Unknown power-failure state: %d\n",
CONFIG_MAINBOARD_POWER_FAILURE_STATE);
pwr_fail |= PWR_FAIL_OFF;
break;

2
src/soc/amd/common/block/smu/smu.c
View File

@ -29,7 +29,7 @@ static int32_t smu_poll_response(bool print_command_duration)
}
} while (!stopwatch_expired(&sw));
printk(BIOS_ERR, "Error: timeout sending SMU message\n");
printk(BIOS_ERR, "timeout sending SMU message\n");
return SMU_MESG_RESP_TIMEOUT;
}

2
src/soc/amd/common/fsp/dmi.c
View File

@ -28,7 +28,7 @@ static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed)
case MEMORY_TYPE_LPDDR4:
return lpddr4_speed_mhz_to_reported_mts(speed);
default:
printk(BIOS_ERR, "ERROR: Unknown memory type %x", ddr_type);
printk(BIOS_ERR, "Unknown memory type %x", ddr_type);
return 0;
}
}

2
src/soc/amd/common/fsp/fsp_reset.c
View File

@ -8,7 +8,7 @@
void chipset_handle_reset(uint32_t status)
{
printk(BIOS_ERR, "Error: unexpected call to %s(0x%08x). Doing cold reset.\n",
printk(BIOS_ERR, "unexpected call to %s(0x%08x). Doing cold reset.\n",
__func__, status);
BUG();
do_cold_reset();

2
src/soc/amd/common/fsp/pci/pci_routing_info.c
View File

@ -26,7 +26,7 @@ const struct pci_routing_info *get_pci_routing_table(size_t *entries)
&hob_size);
if (routing_hob == NULL || hob_size == 0 || routing_hob->num_of_entries == 0) {
printk(BIOS_ERR, "ERROR: Couldn't find valid PCIe interrupt routing HOB.\n");
printk(BIOS_ERR, "Couldn't find valid PCIe interrupt routing HOB.\n");
return NULL;
}

2
src/soc/amd/common/pi/agesawrapper.c
View File

@ -78,7 +78,7 @@ static AGESA_STATUS amd_create_struct(AMD_INTERFACE_PARAMS *aip,
status = module_dispatch(AMD_CREATE_STRUCT, &aip->StdHeader);
if (status != AGESA_SUCCESS) {
printk(BIOS_ERR, "Error: AmdCreateStruct() for 0x%x returned 0x%x. "
printk(BIOS_ERR, "AmdCreateStruct() for 0x%x returned 0x%x. "
"Proper system initialization may not be possible.\n",
aip->AgesaFunctionName, status);
}

2
src/soc/amd/common/pi/def_callouts.c
View File

@ -72,7 +72,7 @@ AGESA_STATUS GetBiosCallout(uint32_t Func, uintptr_t Data, void *ConfigPtr)
}
if (i >= BiosCalloutsLen) {
printk(BIOS_ERR, "ERROR: AGESA Callout Not Supported: 0x%x\n",
printk(BIOS_ERR, "AGESA Callout Not Supported: 0x%x\n",
(u32)Func);
return AGESA_UNSUPPORTED;
}

2
src/soc/amd/common/pi/s3_resume.c
View File

@ -53,7 +53,7 @@ AGESA_STATUS OemS3LateRestore(S3_DATA_BLOCK *dataBlock)
stage_cache_get_raw(STAGE_S3_DATA, &base, &size);
if (!base || !size) {
printk(BIOS_ERR, "Error: S3 volatile data not found\n");
printk(BIOS_ERR, "S3 volatile data not found\n");
return AGESA_FATAL;
}

14
src/soc/amd/common/psp_verstage/psp_verstage.c
View File

@ -100,12 +100,12 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
amdfw_location = cbfs_map(fname, NULL);
if (!amdfw_location) {
printk(BIOS_ERR, "Error: AMD Firmware table not found.\n");
printk(BIOS_ERR, "AMD Firmware table not found.\n");
return POSTCODE_AMD_FW_MISSING;
}
ef_table = (struct embedded_firmware *)amdfw_location;
if (ef_table->signature != EMBEDDED_FW_SIGNATURE) {
printk(BIOS_ERR, "Error: ROMSIG address is not correct.\n");
printk(BIOS_ERR, "ROMSIG address is not correct.\n");
return POSTCODE_ROMSIG_MISMATCH_ERROR;
}
@ -116,11 +116,11 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) +
(uint32_t)boot_dev_base);
if (*psp_dir_in_spi != PSP_COOKIE) {
printk(BIOS_ERR, "Error: PSP Directory address is not correct.\n");
printk(BIOS_ERR, "PSP Directory address is not correct.\n");
return POSTCODE_PSP_COOKIE_MISMATCH_ERROR;
}
if (*bios_dir_in_spi != BDT1_COOKIE) {
printk(BIOS_ERR, "Error: BIOS Directory address is not correct.\n");
printk(BIOS_ERR, "BIOS Directory address is not correct.\n");
return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR;
}
@ -131,7 +131,7 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
}
if (update_psp_bios_dir(&psp_dir_addr, &bios_dir_addr)) {
printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n");
printk(BIOS_ERR, "Updated BIOS Directory could not be set.\n");
return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR;
}
@ -183,7 +183,7 @@ static uint32_t save_buffers(struct vb2_context **ctx)
}
if (buffer_size > max_buffer_size) {
printk(BIOS_ERR, "Error: Buffer is larger than max buffer size.\n");
printk(BIOS_ERR, "Buffer is larger than max buffer size.\n");
post_code(POSTCODE_WORKBUF_BUFFER_SIZE_ERROR);
return POSTCODE_WORKBUF_BUFFER_SIZE_ERROR;
}
@ -198,7 +198,7 @@ static uint32_t save_buffers(struct vb2_context **ctx)
retval = save_uapp_data((void *)_transfer_buffer, buffer_size);
if (retval) {
printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n", retval);
printk(BIOS_ERR, "Could not save workbuf. Error code 0x%08x\n", retval);
return POSTCODE_WORKBUF_SAVE_ERROR;
}

10
src/soc/amd/common/psp_verstage/vboot_crypto.c
View File

@ -50,7 +50,7 @@ vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, uint32_t size)
sha_op.Data = (uint8_t *) buf;
if (!sha_op_size_remaining) {
printk(BIOS_ERR, "ERROR: got more data than expected.\n");
printk(BIOS_ERR, "got more data than expected.\n");
return VB2_ERROR_UNKNOWN;
}
@ -65,7 +65,7 @@ vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, uint32_t size)
retval = svc_crypto_sha(&sha_op, SHA_GENERIC);
if (retval) {
printk(BIOS_ERR, "ERROR: HW crypto failed - errorcode: %#x\n",
printk(BIOS_ERR, "HW crypto failed - errorcode: %#x\n",
retval);
return VB2_ERROR_UNKNOWN;
}
@ -84,12 +84,12 @@ vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, uint32_t size)
vb2_error_t vb2ex_hwcrypto_digest_finalize(uint8_t *digest, uint32_t digest_size)
{
if (sha_op.Eom == 0) {
printk(BIOS_ERR, "ERROR: Got less data than expected.\n");
printk(BIOS_ERR, "Got less data than expected.\n");
return VB2_ERROR_UNKNOWN;
}
if (digest_size != sha_op.DigestLen) {
printk(BIOS_ERR, "ERROR: Digest size does not match expected length.\n");
printk(BIOS_ERR, "Digest size does not match expected length.\n");
return VB2_ERROR_UNKNOWN;
}
@ -134,7 +134,7 @@ vb2_error_t vb2ex_hwcrypto_modexp(const struct vb2_public_key *key,
retval = svc_modexp(&mod_exp_param);
if (retval) {
printk(BIOS_ERR, "ERROR: HW crypto failed - errorcode: %#x\n",
printk(BIOS_ERR, "HW crypto failed - errorcode: %#x\n",
retval);
return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED;
}

2
src/soc/amd/common/vboot/vboot_bootblock.c
View File

@ -35,7 +35,7 @@ void verify_psp_transfer_buf(void)
CMOS_RECOVERY_MAGIC_VAL)
die("Error: Reboot into recovery was unsuccessful. Halting.");
printk(BIOS_ERR, "ERROR: VBOOT workbuf not valid.\n");
printk(BIOS_ERR, "VBOOT workbuf not valid.\n");
printk(BIOS_DEBUG, "Signature: %#08x\n", *(uint32_t *)_vboot2_work);
cmos_init(0);
cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE);

5
src/soc/amd/picasso/data_fabric.c
View File

@ -66,8 +66,7 @@ void data_fabric_set_mmio_np(void)
/* Although a pair could be freed later, this condition is
* very unusual and deserves analysis. Flag an error and
* leave the topmost part unconfigured. */
printk(BIOS_ERR,
"Error: Not enough NB MMIO routing registers\n");
printk(BIOS_ERR, "Not enough NB MMIO routing registers\n");
continue;
}
data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), np_top + 1);
@ -85,7 +84,7 @@ void data_fabric_set_mmio_np(void)
reg = data_fabric_find_unused_mmio_reg();
if (reg < 0) {
printk(BIOS_ERR, "Error: cannot configure region as NP\n");
printk(BIOS_ERR, "cannot configure region as NP\n");
return;
}

2
src/soc/amd/picasso/i2c.c
View File

@ -30,7 +30,7 @@ static struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
void i2c_set_bar(unsigned int bus, uintptr_t bar)
{
if (bus >= ARRAY_SIZE(i2c_ctrlr)) {
printk(BIOS_ERR, "Error: i2c index out of bounds: %u.", bus);
printk(BIOS_ERR, "i2c index out of bounds: %u.", bus);
return;
}

4
src/soc/amd/picasso/root_complex.c
View File

@ -139,7 +139,7 @@ static void read_resources(struct device *dev)
mmconf_resource(dev, MMIO_CONF_BASE);
if (!hob) {
printk(BIOS_ERR, "Error: %s incomplete because no HOB list was found\n",
printk(BIOS_ERR, "%s incomplete because no HOB list was found\n",
__func__);
return;
}
@ -161,7 +161,7 @@ static void read_resources(struct device *dev)
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource(dev, idx++, res->addr / KiB, res->length / KiB);
else
printk(BIOS_ERR, "Error: failed to set resources for type %d\n",
printk(BIOS_ERR, "failed to set resources for type %d\n",
res->type);
}

2
src/soc/amd/picasso/smihandler.c
View File

@ -124,7 +124,7 @@ static void fch_slp_typ_handler(void)
psp_notify_sx_info(ACPI_S3);
smu_sx_entry(); /* Leave SlpTypeEn clear, SMU will set */
printk(BIOS_ERR, "Error: System did not go to sleep\n");
printk(BIOS_ERR, "System did not go to sleep\n");
hlt();
}

4
src/soc/amd/stoneyridge/romstage.c
View File

@ -151,7 +151,7 @@ void SetMemParams(AMD_POST_PARAMS *PostParams)
const struct device *dev = pcidev_path_on_root(GNB_DEVFN);
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "ERROR: Cannot find SoC devicetree config\n");
printk(BIOS_ERR, "Cannot find SoC devicetree config\n");
/* In case of a BIOS error, only attempt to set UMA. */
PostParams->MemConfig.UmaMode = CONFIG(GFXUMA) ?
UMA_AUTO : UMA_NONE;
@ -189,7 +189,7 @@ void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly)
struct _PLATFORM_CONFIGURATION *platform;
if (!dev || !dev->chip_info) {
printk(BIOS_WARNING, "Warning: Cannot find SoC devicetree"
printk(BIOS_WARNING, "Cannot find SoC devicetree"
" config, STAPM unchanged\n");
return;
}

4
src/soc/cavium/cn81xx/cpu.c
View File

@ -97,7 +97,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
} while (!stopwatch_expired(&sw) && (pending & coremask));
if (stopwatch_expired(&sw)) {
printk(BIOS_ERR, "ERROR: Timeout waiting for reset "
printk(BIOS_ERR, "Timeout waiting for reset "
"pending to clear.");
return 1;
}
@ -113,7 +113,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
dmb();
if (!read64(&secondary_booted)) {
printk(BIOS_ERR, "ERROR: Core %zu failed to start.\n", cpu);
printk(BIOS_ERR, "Core %zu failed to start.\n", cpu);
return 1;
}

6
src/soc/cavium/cn81xx/ecam0.c
View File

@ -163,7 +163,7 @@ static size_t ecam0_pci_enable_msix(struct device *dev,
}
nr_entries = pci_msix_table_size(dev);
if (nvec > nr_entries) {
printk(BIOS_ERR, "ERROR: %s: Specified to many table entries\n",
printk(BIOS_ERR, "%s: Specified to many table entries\n",
dev_path(dev));
return nr_entries;
}
@ -177,13 +177,13 @@ static size_t ecam0_pci_enable_msix(struct device *dev,
offset = 0;
bar_idx = 0;
if (pci_msix_table_bar(dev, &offset, &bar_idx)) {
printk(BIOS_ERR, "ERROR: %s: Failed to find MSI-X entry\n",
printk(BIOS_ERR, "%s: Failed to find MSI-X entry\n",
dev_path(dev));
return -1;
}
bar = ecam0_get_bar_val(dev, bar_idx);
if (!bar) {
printk(BIOS_ERR, "ERROR: %s: Failed to find MSI-X bar\n",
printk(BIOS_ERR, "%s: Failed to find MSI-X bar\n",
dev_path(dev));
return -1;
}

2
src/soc/intel/alderlake/chip.c
View File

@ -150,7 +150,7 @@ void soc_init_pre_device(void *chip_info)
static void cpu_fill_ssdt(const struct device *dev)
{
if (!generate_pin_irq_map())
printk(BIOS_ERR, "ERROR: Failed to generate ACPI _PRT table!\n");
printk(BIOS_ERR, "Failed to generate ACPI _PRT table!\n");
generate_cpu_entries(dev);
}

6
src/soc/intel/alderlake/romstage/fsp_params.c
View File

@ -284,17 +284,17 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg,
if (m_cfg->VtdIgdEnable && m_cfg->VtdBaseAddress[VTD_GFX] == 0) {
m_cfg->VtdIgdEnable = 0;
printk(BIOS_ERR, "ERROR: Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
printk(BIOS_ERR, "Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
}
if (m_cfg->VtdIpuEnable && m_cfg->VtdBaseAddress[VTD_IPU] == 0) {
m_cfg->VtdIpuEnable = 0;
printk(BIOS_ERR, "ERROR: Requested IPU VT-d, but IPUVT_BASE_ADDRESS is 0\n");
printk(BIOS_ERR, "Requested IPU VT-d, but IPUVT_BASE_ADDRESS is 0\n");
}
if (!m_cfg->VtdDisable && m_cfg->VtdBaseAddress[VTD_VTVCO] == 0) {
m_cfg->VtdDisable = 1;
printk(BIOS_ERR, "ERROR: Requested VT-d, but VTVCO_BASE_ADDRESS is 0\n");
printk(BIOS_ERR, "Requested VT-d, but VTVCO_BASE_ADDRESS is 0\n");
}
if (m_cfg->TcssDma0En || m_cfg->TcssDma1En)

2
src/soc/intel/alderlake/systemagent.c
View File

@ -87,7 +87,7 @@ void soc_systemagent_init(struct device *dev)
}
if (i == ARRAY_SIZE(cpuid_to_adl)) {
printk(BIOS_ERR, "ERROR: unknown SA ID: 0x%4x, skipped power limits configuration.\n",
printk(BIOS_ERR, "unknown SA ID: 0x%4x, skipped power limits configuration.\n",
sa_pci_id);
return;
}

2
src/soc/intel/alderlake/vr_config.c
View File

@ -53,7 +53,7 @@ static uint32_t load_table(const struct vr_lookup *tbl, const int tbl_entries, c
return tbl[i].conf[domain];
}
printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
return 0;
}

5
src/soc/intel/braswell/southcluster.c
View File

@ -106,7 +106,7 @@ static void write_pci_config_irqs(void)
const struct soc_irq_route *ir = &global_soc_irq_route;
if (ir == NULL) {
printk(BIOS_WARNING, "Warning: Can't write PCI IRQ assignments "
printk(BIOS_WARNING, "Can't write PCI IRQ assignments "
"because 'global_braswell_irq_route' structure does not exist\n");
return;
}
@ -142,8 +142,7 @@ static void write_pci_config_irqs(void)
device_num = PCI_SLOT(parent_bdf);
if (ir->pcidev[device_num] == 0) {
printk(BIOS_WARNING,
"Warning: PCI Device %d does not have an IRQ entry, "
printk(BIOS_WARNING, "PCI Device %d does not have an IRQ entry, "
"skipping it\n", device_num);
continue;
}

2
src/soc/intel/broadwell/pch/me_status.c
View File

@ -307,7 +307,7 @@ void intel_me_hsio_version(uint16_t *version, uint16_t *checksum)
udelay(ME_DELAY);
}
if (!count) {
printk(BIOS_ERR, "ERROR: ME failed to respond\n");
printk(BIOS_ERR, "ME failed to respond\n");
return;
}

2
src/soc/intel/cannonlake/chip.c
View File

@ -162,7 +162,7 @@ static void cpu_fill_ssdt(const struct device *dev)
generate_cpu_entries(dev);
if (!generate_pin_irq_map())
printk(BIOS_ERR, "ERROR: Failed to generate ACPI _PRT table!\n");
printk(BIOS_ERR, "Failed to generate ACPI _PRT table!\n");
}
static void cpu_set_north_irqs(struct device *dev)

2
src/soc/intel/cannonlake/vr_config.c
View File

@ -107,7 +107,7 @@ static uint16_t load_table(const struct vr_lookup *tbl,
break;
}
printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
return 0;
}

12
src/soc/intel/common/block/acpi/acpi_bert.c
View File

@ -39,7 +39,7 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
}
if (!cl_get_total_data_size()) {
printk(BIOS_ERR, "Error: No crashlog record present\n");
printk(BIOS_ERR, "No crashlog record present\n");
return CB_ERR;
}
@ -47,12 +47,12 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
gesb_header_size = sizeof(*status);
if (!status) {
printk(BIOS_ERR, "Error: unable to allocate GSB\n");
printk(BIOS_ERR, "unable to allocate GSB\n");
return CB_ERR;
}
if (cl_get_total_data_size() > bert_storage_remaining()) {
printk(BIOS_ERR, "Error: Crashlog entry would exceed "
printk(BIOS_ERR, "Crashlog entry would exceed "
"available region\n");
return CB_ERR;
}
@ -61,7 +61,7 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
if (cpu_record_size) {
cl_data = new_cper_fw_error_crashlog(status, cpu_record_size);
if (!cl_data) {
printk(BIOS_ERR, "Error: Crashlog CPU entry(size %lu) "
printk(BIOS_ERR, "Crashlog CPU entry(size %lu) "
"would exceed available region\n",
cpu_record_size);
return CB_ERR;
@ -75,14 +75,14 @@ enum cb_err acpi_soc_get_bert_region(void **region, size_t *length)
if (pmc_record_size) {
/* Allocate new FW ERR structure in case CPU crashlog is present */
if (cpu_record_size && !bert_append_fw_err(status)) {
printk(BIOS_ERR, "Error: Crashlog PMC entry would "
printk(BIOS_ERR, "Crashlog PMC entry would "
"exceed available region\n");
return CB_ERR;
}
cl_data = new_cper_fw_error_crashlog(status, pmc_record_size);
if (!cl_data) {
printk(BIOS_ERR, "Error: Crashlog PMC entry(size %lu) "
printk(BIOS_ERR, "Crashlog PMC entry(size %lu) "
"would exceed available region\n",
pmc_record_size);
return CB_ERR;

2
src/soc/intel/common/block/cse/cse.c
View File

@ -1051,7 +1051,7 @@ static void me_reset_with_count(void)
* If the (CS)ME fails to change states after 3 attempts, it will
* likely need a cold boot, or recovering.
*/
printk(BIOS_ERR, "Error: Failed to change ME state in %u attempts!\n",
printk(BIOS_ERR, "Failed to change ME state in %u attempts!\n",
ME_DISABLE_ATTEMPTS);
}

2
src/soc/intel/common/block/cse/cse_eop.c
View File

@ -172,7 +172,7 @@ static void handle_cse_eop_result(enum cse_eop_result result)
break;
case CSE_EOP_RESULT_ERROR: /* fallthrough */
default:
printk(BIOS_ERR, "ERROR: Failed to send EOP to CSE, %d\n", result);
printk(BIOS_ERR, "Failed to send EOP to CSE, %d\n", result);
/* For vboot, trigger recovery mode if applicable, as there is
likely something very broken in this case. */
if (CONFIG(VBOOT) && !vboot_recovery_mode_enabled())

6
src/soc/intel/common/block/fast_spi/fast_spi_flash.c
View File

@ -350,7 +350,7 @@ static int fast_spi_flash_protect(const struct spi_flash *flash,
}
if (fpr >= SPIBAR_FPR_MAX) {
printk(BIOS_ERR, "ERROR: No SPI FPR free!\n");
printk(BIOS_ERR, "No SPI FPR free!\n");
return -1;
}
@ -365,7 +365,7 @@ static int fast_spi_flash_protect(const struct spi_flash *flash,
protect_mask |= (SPI_FPR_RPE | SPI_FPR_WPE);
break;
default:
printk(BIOS_ERR, "ERROR: Seeking invalid protection!\n");
printk(BIOS_ERR, "Seeking invalid protection!\n");
return -1;
}
@ -376,7 +376,7 @@ static int fast_spi_flash_protect(const struct spi_flash *flash,
write32((void *)fpr_base, reg);
reg = read32((void *)fpr_base);
if (!(reg & protect_mask)) {
printk(BIOS_ERR, "ERROR: Unable to set SPI FPR %d\n", fpr);
printk(BIOS_ERR, "Unable to set SPI FPR %d\n", fpr);
return -1;
}

10
src/soc/intel/common/block/irq/irq.c
View File

@ -128,7 +128,7 @@ static int pirq_to_irq(enum pirq pirq)
static bool assign_pirq(struct pin_info pin_info[PCI_INT_MAX], enum pci_pin pin, enum pirq pirq)
{
if (pirq < PIRQ_A || pirq > PIRQ_H) {
printk(BIOS_ERR, "ERROR: Invalid pirq constraint %u\n", pirq);
printk(BIOS_ERR, "Invalid pirq constraint %u\n", pirq);
return false;
}
@ -143,7 +143,7 @@ static bool assign_pin(enum pci_pin pin, unsigned int fn, enum pin_state state,
enum pci_pin fn_pin_map[MAX_FNS])
{
if (pin < PCI_INT_A || pin > PCI_INT_D) {
printk(BIOS_ERR, "ERROR: Invalid pin constraint %u\n", pin);
printk(BIOS_ERR, "Invalid pin constraint %u\n", pin);
return false;
}
@ -182,7 +182,7 @@ static bool assign_fixed_pirqs(const struct slot_irq_constraints *constraints,
fixed pin */
const enum pci_pin pin = fn_pin_map[i];
if (pin == PCI_INT_NONE) {
printk(BIOS_ERR, "ERROR: Slot %u, pirq %u, no pin for function %zu\n",
printk(BIOS_ERR, "Slot %u, pirq %u, no pin for function %zu\n",
constraints->slot, fixed_pirq, i);
return false;
}
@ -210,7 +210,7 @@ static bool assign_direct_irqs(const struct slot_irq_constraints *constraints,
const int irq = find_free_unique_irq();
if (irq == INVALID_IRQ) {
printk(BIOS_ERR, "ERROR: No free unique IRQs found\n");
printk(BIOS_ERR, "No free unique IRQs found\n");
return false;
}
@ -234,7 +234,7 @@ static bool assign_shareable_pins(const struct slot_irq_constraints *constraints
pin = find_shareable_pin(pin_info);
if (pin == PCI_INT_NONE) {
printk(BIOS_ERR, "ERROR: No shareable pins found\n");
printk(BIOS_ERR, "No shareable pins found\n");
return false;
}
}

2
src/soc/intel/common/block/pcie/pcie_helpers.c
View File

@ -29,7 +29,7 @@ uint32_t pcie_rp_enable_mask(const struct pcie_rp_group *const groups)
for (group = groups; group->count; ++group) {
if (group->count + offset >= sizeof(mask) * 8) {
printk(BIOS_ERR, "ERROR: %s: Root port count greater than mask size!\n",
printk(BIOS_ERR, "%s: Root port count greater than mask size!\n",
__func__);
break;
}

2
src/soc/intel/common/block/pmc/pmclib.c
View File

@ -611,7 +611,7 @@ void pmc_set_power_failure_state(const bool target_on)
pmc_soc_set_afterg3_en(target_on);
break;
default:
printk(BIOS_WARNING, "WARNING: Unknown power-failure state: %d\n", state);
printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
break;
}
}

4
src/soc/intel/common/block/thermal/thermal_pci.c
View File

@ -19,13 +19,13 @@ void pch_thermal_configuration(void)
dev = pcidev_path_on_root(PCH_DEVFN_THERMAL);
if (!dev) {
printk(BIOS_ERR, "ERROR: PCH_DEVFN_THERMAL device not found!\n");
printk(BIOS_ERR, "PCH_DEVFN_THERMAL device not found!\n");
return;
}
res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res) {
printk(BIOS_ERR, "ERROR: PCH thermal device not found!\n");
printk(BIOS_ERR, "PCH thermal device not found!\n");
return;
}

3
src/soc/intel/quark/storage_test.c
View File

@ -195,8 +195,7 @@ void storage_test(uint32_t bar, int full_initialization)
err = storage_setup_media(media, &sdhci_ctrlr->sd_mmc_ctrlr);
if (err) {
display_log();
printk(BIOS_ERR,
"ERROR: Device failed to initialize, err = %d\n",
printk(BIOS_ERR, "Device failed to initialize, err = %d\n",
err);
return;
}

4
src/soc/intel/skylake/vr_config.c
View File

@ -222,7 +222,7 @@ static uint16_t get_sku_icc_max(int domain)
return icc_max[domain];
}
default:
printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
}
return 0;
}
@ -292,7 +292,7 @@ static uint16_t get_sku_ac_dc_loadline(const int domain)
return loadline[domain];
}
default:
printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
printk(BIOS_ERR, "Unknown MCH (0x%x) in %s\n", mch_id, __func__);
}
return 0;
}

2
src/soc/intel/tigerlake/chip.c
View File

@ -164,7 +164,7 @@ void soc_init_pre_device(void *chip_info)
static void cpu_fill_ssdt(const struct device *dev)
{
if (!generate_pin_irq_map())
printk(BIOS_ERR, "ERROR: Failed to generate ACPI _PRT table!\n");
printk(BIOS_ERR, "Failed to generate ACPI _PRT table!\n");
generate_cpu_entries(dev);
}

2
src/soc/mediatek/common/include/soc/msdc.h
View File

@ -162,7 +162,7 @@ struct msdc_ctrlr {
#define msdc_debug(format...) printk(BIOS_DEBUG, format)
#define msdc_trace(format...) printk(BIOS_DEBUG, format)
#define msdc_error(format...) printk(BIOS_ERR, "ERROR: " format)
#define msdc_error(format...) printk(BIOS_ERR, format)
int mtk_emmc_early_init(void *base, void *top_base);
void mtk_msdc_configure_emmc(bool is_early_init);

4
src/soc/mediatek/mt8173/da9212.c
View File

@ -46,7 +46,7 @@ static void da9212_hw_init(uint8_t i2c_num, unsigned char variant_id)
DA9212_BUCK_MODE_MASK, DA9212_BUCK_MODE_SHIFT);
if (ret)
printk(BIOS_ERR, "ERROR: %s failed\n", __func__);
printk(BIOS_ERR, "%s failed\n", __func__);
}
@ -74,7 +74,7 @@ void da9212_probe(uint8_t i2c_num)
/* Check device ID is DA9212 */
if (device_id != DA9212_ID || ret) {
printk(BIOS_ERR, "ERROR: unknown DA9212 device_id\n");
printk(BIOS_ERR, "unknown DA9212 device_id\n");
return;
}

Some files were not shown because too many files have changed in this diff Show More