soc/sifive/fu540: Add driver for OTP memory

Provides minimal functionality to read the SOC s/n from the NeoFuse
one time programmable memory.

Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/27435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

Documentation/mainboard/sifive/hifive-unleashed.md

@@ -18,7 +18,7 @@ The following things are still missing from this coreboot port:
 - Placing the ramstage in DRAM
 - Starting the U54 cores
 - FU540 PIN configuration and GPIO access macros
-- FU540 OTP driver and serial number read-out
+- Provide serial number to payload (e.g. in device tree)
 - Support for booting Linux on RISC-V