cpu/amd/model_10xxx: Refactor model detection to reduce code duplication
Moved mctGetLogicalCPUID() to a separate file and made it available in both romstage and ramstage. Change-Id: I959c1caa8f796947b627a7b379c37d7307e2898e Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/8499 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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Alexandru Gagniuc
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29c1afce62
commit
ead8751367
@@ -31,6 +31,8 @@
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#include <cpu/amd/amdfam10_sysconf.h>
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#include <arch/cpu.h>
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#include <northbridge/amd/amdht/AsPsDefs.h>
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#include <northbridge/amd/amdmct/mct/mct.h>
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#include <northbridge/amd/amdmct/amddefs.h>
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static void write_pstates_for_core(u8 pstate_num, u16 *pstate_feq, u32 *pstate_power,
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u32 *pstate_latency, u32 *pstate_control,
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@@ -114,8 +116,6 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
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printk(BIOS_INFO, "processor_brand=%s\n", processor_brand);
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uint32_t dtemp;
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uint32_t cpuid_fms;
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uint8_t model;
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uint8_t node_count;
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/*
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@@ -124,13 +124,10 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
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* cmp_cap : 0x0 SingleCore ; 0x1 DualCore ; 0x2 TripleCore ; 0x3 QuadCore ; 0x4 QuintupleCore ; 0x5 HexCore
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*/
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printk(BIOS_INFO, "Pstates algorithm ...\n");
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/* Get CPU model */
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cpuid_fms = cpuid_eax(0x80000001);
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model = ((cpuid_fms & 0xf0000) >> 16) | ((cpuid_fms & 0xf0) >> 4);
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/* Get number of cores */
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dtemp = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8);
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cmp_cap = (dtemp & 0x3000) >> 12;
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if ((model == 0x8) || (model == 0x9)) /* revision D */
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if (mctGetLogicalCPUID(0) & AMD_FAM10_REV_D) /* revision D */
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cmp_cap |= (dtemp & 0x8000) >> 13;
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/* Get number of nodes */
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dtemp = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 0)), 0x60);
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