soc/intel/alderlake: set power limits dynamically for thermal
Set power limit values dynamically based on CPU TDP and PCI ID of SKU. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 board Change-Id: Ic331a3debb076ef08a312a31edc1468974fd4902 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57035 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
committed by
Tim Wawrzynczak
parent
dc0e066406
commit
eaf87a9d60
@ -4,6 +4,7 @@
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#define _SOC_CHIP_H_
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#include <drivers/i2c/designware/dw_i2c.h>
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#include <device/pci_ids.h>
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#include <intelblocks/cfg.h>
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#include <intelblocks/gpio.h>
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#include <intelblocks/gspi.h>
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@ -20,14 +21,37 @@
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/* Types of different SKUs */
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enum soc_intel_alderlake_power_limits {
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ADL_P_POWER_LIMITS_282_CORE,
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ADL_P_POWER_LIMITS_482_CORE,
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ADL_P_POWER_LIMITS_682_CORE,
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ADL_M_POWER_LIMITS_282_CORE,
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ADL_M_POWER_LIMITS_242_CORE,
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ADL_P_282_CORE,
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ADL_P_482_CORE,
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ADL_P_682_28W_CORE,
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ADL_P_682_45W_CORE,
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ADL_M_282_CORE,
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ADL_M_242_CORE,
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ADL_POWER_LIMITS_COUNT
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};
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/* TDP values for different SKUs */
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enum soc_intel_alderlake_cpu_tdps {
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TDP_9W = 9,
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TDP_15W = 15,
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TDP_28W = 28,
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TDP_45W = 45
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};
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/* Mapping of different SKUs based on CPU ID and TDP values */
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static const struct {
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unsigned int cpu_id;
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enum soc_intel_alderlake_power_limits limits;
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enum soc_intel_alderlake_cpu_tdps cpu_tdp;
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} cpuid_to_adl[] = {
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_7, ADL_P_282_CORE, TDP_15W },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, ADL_P_482_CORE, TDP_28W },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_28W_CORE, TDP_28W },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_45W_CORE, TDP_45W },
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{ PCI_DEVICE_ID_INTEL_ADL_M_ID_1, ADL_M_282_CORE, TDP_15W },
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{ PCI_DEVICE_ID_INTEL_ADL_M_ID_2, ADL_M_242_CORE, TDP_9W },
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};
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/* Types of display ports */
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enum ddi_ports {
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DDI_PORT_A,
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