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Intel northbridge I945: Apply un-written naming rules

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Use NORTHBRIDGE_INTEL_I945 to select the driver directory for build.

Use _SUBTYPE_945GC and _SUBTYPE_945GM to define at compile-time
which model of I945 the driver is built for.

Change-Id: I11b1e0998d0fc28f8946bad4f0989036a9b18af4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/684
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki
2012-02-24 16:08:18 +02:00
committed by Patrick Georgi
parent d4d5e4d3e1
commit eb5e28ffc6
11 changed files with 36 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
src/northbridge/intel/i945/raminit.c
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@@ -113,7 +113,7 @@ void sdram_dump_mchbar_registers(void)
static int memclk(void)
{
int offset = 0;
#if CONFIG_NORTHBRIDGE_INTEL_I945GM
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
offset++;
#endif
switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
@@ -125,7 +125,7 @@ static int memclk(void)
return -1;
}
#if CONFIG_NORTHBRIDGE_INTEL_I945GM
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
@@ -136,7 +136,7 @@ static u16 fsbclk(void)
}
return 0xffff;
}
#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
@@ -1075,7 +1075,7 @@ static const u32 *slew_group_lookup(int dual_channel, int index)
return nc;
}
#if CONFIG_NORTHBRIDGE_INTEL_I945GM
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
/* Strength multiplier tables */
static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11,
@@ -1130,7 +1130,7 @@ static const u8 single_channel_strength_multiplier[] = {
0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11,
0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11
};
#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
@@ -2186,7 +2186,7 @@ static void sdram_program_clock_crossing(void)
/**
* We add the indices according to our clocks from CLKCFG.
*/
#if CONFIG_NORTHBRIDGE_INTEL_I945GM
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
static const u32 data_clock_crossing[] = {
0x00100401, 0x00000000, /* DDR400 FSB400 */
0xffffffff, 0xffffffff, /* nonexistant */
@@ -2231,7 +2231,7 @@ static void sdram_program_clock_crossing(void)
0xffffffff, 0xffffffff, /* nonexistant */
};
#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
/* i945 G/P */
static const u32 data_clock_crossing[] = {
0xffffffff, 0xffffffff, /* nonexistant */
@@ -2822,9 +2822,9 @@ static void sdram_enable_memory_clocks(struct sys_info *sysinfo)
{
u8 clocks[2] = { 0, 0 };
#if CONFIG_NORTHBRIDGE_INTEL_I945GM
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
#define CLOCKS_WIDTH 2
#elif CONFIG_NORTHBRIDGE_INTEL_I945GC
#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
#define CLOCKS_WIDTH 3
#endif
if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)