mb/google/brox/var/jubilant: Add SAR sensor SX9324

Add SAR Sensor SX9324 for WWAN:
- Apply DRIVERS_I2C_SX9324
- Config GPP_H19 for IRQ
- Add SX9324 registers settings based on tuning value from SEMTECH.
  Refer to datasheet:
  https://chromeos.google.com/partner/dlm/avl/component/3624/

BUG=b:345327104
TEST=Build and verify on jubilant

Change-Id: I629117f20ca513dc0c8eaa91744ad33e162ba4bb
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83779
Reviewed-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/mainboard/google/brox/Kconfig

@@ -88,6 +88,7 @@ config BOARD_GOOGLE_JUBILANT
 	select BOARD_GOOGLE_BASEBOARD_BROX
 	select CHROMEOS_WIFI_SAR if CHROMEOS
 	select DRIVERS_GENERIC_ALC1015
+	select DRIVERS_I2C_SX9324
 	select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS
 
 if BOARD_GOOGLE_BROX_COMMON

src/mainboard/google/brox/variants/jubilant/gpio.c

@@ -31,6 +31,8 @@ static const struct pad_config override_gpio_table[] = {
 	PAD_CFG_GPO(GPP_A12, 1, DEEP),
 	/* GPP_H23 : SRCCLKREQ5_L ==> WWAN_RST_L */
 	PAD_CFG_GPO_LOCK(GPP_H23, 1, LOCK_CONFIG),
+	/* GPP_H19 : SRCCLKREQ4_L ==> SAR1_INT_L */
+	PAD_CFG_GPI_APIC_LOCK(GPP_H19, NONE, LEVEL, NONE, LOCK_CONFIG),
 
 	/* GPP_D2 : [NF1: ISH_GP2 NF2: BK2 NF5: SBK2 NF6: USB_C_GPP_D2] ==> EN_FP_PWR (active high) */
 	PAD_CFG_GPO_LOCK(GPP_D2, 0, LOCK_CONFIG),

src/mainboard/google/brox/variants/jubilant/overridetree.cb

@@ -404,6 +404,29 @@ chip soc/intel/alderlake
 				register "sdb" =  "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F20)"
 				device generic 0 on end
 			end
+			chip drivers/i2c/sx9324
+				register "desc" = ""SAR Proximity Sensor""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
+				register "speed" = "I2C_SPEED_FAST"
+				register "uid" = "1"
+				register "ph0_pin" = "{1, 2, 2}"
+				register "ph1_pin" = "{2, 1, 2}"
+				register "ph2_pin" = "{2, 2, 1}"
+				register "ph3_pin" = "{2, 1, 1}"
+				register "ph01_resolution" = "1024"
+				register "ph23_resolution" = "1024"
+				register "startup_sensor" = "1"
+				register "ph01_proxraw_strength" = "2"
+				register "ph23_proxraw_strength" = "2"
+				register "avg_pos_strength" = "256"
+				register "cs_idle_sleep" = ""hi-z""
+				register "int_comp_resistor" = ""lowest""
+				register "input_precharge_resistor_ohms" = "4000"
+				register "input_analog_gain" = "1"
+				device i2c 28 on
+					probe DB_USB DB_1A_LTE
+				end
+			end
 		end
 		device ref gspi1 on
 			chip drivers/spi/acpi