soc/intel/bsw: Move memory init values into romstage.h

`chip.h` is usually used as devicetree interface.

Change-Id: Ied30927d68927b86758a84ccf3f5fbd8cce632f1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32592
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/braswell/chip.h

@@ -32,9 +32,6 @@
 #define SVID_CONFIG3		3
 #define SVID_PMIC_CONFIG	8
 
-#define MEM_DDR3	0
-#define MEM_LPDDR3	1
-
 enum lpe_clk_src {
 	LPE_CLK_SRC_XTAL,
 	LPE_CLK_SRC_PLL,