mb/google/nissa: Disable SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY

On nissa, the pre-x86 time is not part of the 1s firmware boot time
target. Including the pre-x86 timestamps causes confusion since the boot
time appears to be greater than 1s, so disable the Kconfig on nissa.
We're not doing any analysis or optimisation of the pre-x86 time on
nissa anyway, this work will start from MTL onwards. Also, the Kconfig
is already disabled on the brya firmware branch, so this will result in
the same behaviour as brya.

Before:
Total Time: 1,205,840

After:
Total Time: 995,300

BUG=b:239769532
TEST=Boot nivviks, check "1st timestamp" is the first timestamp.

Change-Id: I885071c9e0ff9c8fac9444b382567d38a19c3c15
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68553
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Reka Norman
2022-10-19 09:04:15 +11:00
committed by Felix Held
parent 73fec24319
commit ec929142c6
2 changed files with 3 additions and 1 deletions

View File

@@ -117,7 +117,6 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_CSE_SEND_EOP_EARLY
select SOC_INTEL_CSE_SET_EOP
select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY if SOC_INTEL_CSE_LITE_SKU
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
select HAVE_INTEL_COMPLIANCE_TEST_MODE
select SSE2