skylake,fsp1_1: Delete dead report_memory_config()
function
RAM is not yet configured in bootblock. This function was copy-pasted from Broadwell. Also, Skylake no longer uses FSP 1.1 and the stubs in there can be removed as nothing else uses them. Change-Id: I22cb7e63ed1e9565934296fd40771130ba91d227 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50949 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -34,7 +34,6 @@ void mainboard_add_dimm_info(struct romstage_params *params,
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struct memory_info *mem_info,
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int channel, int dimm, int index);
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void raminit(struct romstage_params *params);
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void report_memory_config(void);
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/* Initialize memory margin analysis settings. */
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void setup_mma(MEMORY_INIT_UPD *memory_upd);
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void soc_after_ram_init(struct romstage_params *params);
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@@ -237,9 +237,6 @@ void raminit(struct romstage_params *params)
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die_with_post_code(POST_INVALID_VENDOR_BINARY,
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"ERROR - coreboot's requirements not met by FSP binary!\n");
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/* Display the memory configuration */
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report_memory_config();
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/* Locate the memory configuration data to speed up the next reboot */
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mrc_hob = get_next_guid_hob(&mrc_guid, hob_list_ptr);
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if (mrc_hob == NULL) {
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@@ -291,11 +291,6 @@ __weak int mrc_cache_stash_data(int type, uint32_t version,
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return -1;
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}
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/* Display the memory configuration */
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__weak void report_memory_config(void)
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{
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}
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/* SOC initialization after RAM is enabled */
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__weak void soc_after_ram_init(struct romstage_params *params)
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{
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