Braswell: Implement Gpio library functions to read RAMID

Added GPIO library code to allow all BSW board specific code
to use memory configuration GPIOs in GPIO Input mode and read
them to determine which memory type is on the board.

Also added other GPIO related APIs to support GPIO access
in BSW.

Original-Reviewed-on: https://chromium-review.googlesource.com/294893
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Idd65136c0449f0cdebfae12a510985e29889fa2b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/12735
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Subrata Banik
2015-08-22 10:36:41 +05:30
committed by Martin Roth
parent 2cfab90baa
commit ed7275f2c3
4 changed files with 321 additions and 3 deletions

View File

@@ -23,6 +23,7 @@ ramstage-y += gpio.c
ifeq ($(CONFIG_GOP_SUPPORT),n)
ramstage-y += gfx.c
endif
ramstage-y += gpio_support.c
ramstage-y += hda.c
ramstage-y += iosf.c
ramstage-y += lpe.c