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cpu/x86: Link page tables in stage if possible

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When switching back and forth between 32 to 64 bit mode, for example to
call a 32-bits FSP or to call the payload, new page tables in the
respective stage will be linked.

The advantages of this approach are:
- No need to determine a good place for page tables in CBFS that does
  not overlap.
- Works with non memory mapped flash (however all coreboot targets
  currently do support this)
- If later stages can use their own page tables which fits better with
  the vboot RO/RW flow

A disadvantage is that it increases the stage size. This could be
improved upon by using 1G pages and generating the pages at runtime.

Note: qemu cannot have the page tables in the RO boot medium and needs
to relocate them at runtime. This is why keeping the existing code with
page tables in CBFS is done for now.

TEST: Booted to payload on google/vilbox and qemu/q35

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ied54b66b930187cba5fbc578a81ed5859a616562
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80337
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2024-02-02 18:49:53 +01:00 committed by Martin L Roth
parent 34684caad5
commit ee83be4d75
13 changed files with 28 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/arch/x86/Kconfig
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@ -83,9 +83,13 @@ config USE_EXP_X86_64_SUPPORT
is an experimental option: do not enable unless one wants to test it is an experimental option: do not enable unless one wants to test it
and has the means to recover a system when coreboot fails to boot. and has the means to recover a system when coreboot fails to boot.
config PAGE_TABLES_IN_CBFS
bool
default n
config ARCH_X86_64_PGTBL_LOC config ARCH_X86_64_PGTBL_LOC
hex "x86_64 page table location in CBFS" hex "x86_64 page table location in CBFS"
depends on ARCH_BOOTBLOCK_X86_64 depends on ARCH_BOOTBLOCK_X86_64 && PAGE_TABLES_IN_CBFS
default 0xfffe9000 default 0xfffe9000
help help
The position where to place pagetables. Needs to be known at The position where to place pagetables. Needs to be known at

2
src/cpu/intel/car/core2/cache_as_ram.S
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@ -163,7 +163,7 @@ addrsize_set_high:
subl $4, %esp subl $4, %esp
#if ENV_X86_64 #if ENV_X86_64
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
movd %mm2, %rdi movd %mm2, %rdi
shlq $32, %rdi shlq $32, %rdi

2
src/cpu/intel/car/non-evict/cache_as_ram.S
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@ -214,7 +214,7 @@ end_microcode_update:
andl $0xfffffff0, %esp andl $0xfffffff0, %esp
#if ENV_X86_64 #if ENV_X86_64
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
movd %mm2, %rdi movd %mm2, %rdi
shlq $32, %rdi shlq $32, %rdi

2
src/cpu/intel/car/p4-netburst/cache_as_ram.S
View File

@ -363,7 +363,7 @@ fill_cache:
subl $4, %esp subl $4, %esp
#if ENV_X86_64 #if ENV_X86_64
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
movd %mm2, %rdi movd %mm2, %rdi
shlq $32, %rdi /* BIST */ shlq $32, %rdi /* BIST */

4
src/cpu/x86/64bit/Makefile.mk
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@ -9,13 +9,15 @@ else
PAGETABLE_SRC := pt.S PAGETABLE_SRC := pt.S
endif endif
all_x86-y += $(PAGETABLE_SRC)
# Add --defsym=_start=0 to suppress a linker warning. # Add --defsym=_start=0 to suppress a linker warning.
$(objcbfs)/pt: $(dir)/$(PAGETABLE_SRC) $(obj)/config.h $(objcbfs)/pt: $(dir)/$(PAGETABLE_SRC) $(obj)/config.h
$(CC_bootblock) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -o $@.tmp $< -Wl,--section-start=.rodata=$(CONFIG_ARCH_X86_64_PGTBL_LOC),--defsym=_start=0 $(CC_bootblock) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -o $@.tmp $< -Wl,--section-start=.rodata=$(CONFIG_ARCH_X86_64_PGTBL_LOC),--defsym=_start=0
$(OBJCOPY_ramstage) -Obinary -j .rodata $@.tmp $@ $(OBJCOPY_ramstage) -Obinary -j .rodata $@.tmp $@
rm $@.tmp rm $@.tmp
cbfs-files-y += pagetables cbfs-files-$(CONFIG_PAGE_TABLES_IN_CBFS) += pagetables
pagetables-file := $(objcbfs)/pt pagetables-file := $(objcbfs)/pt
pagetables-type := raw pagetables-type := raw
pagetables-compression := none pagetables-compression := none

2
src/cpu/x86/64bit/entry64.inc
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@ -11,9 +11,11 @@
#if ENV_X86_64 #if ENV_X86_64
.code32 .code32
#if CONFIG(PAGE_TABLES_IN_CBFS)
#if (CONFIG_ARCH_X86_64_PGTBL_LOC & 0xfff) > 0 #if (CONFIG_ARCH_X86_64_PGTBL_LOC & 0xfff) > 0
#error pagetables must be 4KiB aligned! #error pagetables must be 4KiB aligned!
#endif #endif
#endif
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#if defined(__RAMSTAGE__) #if defined(__RAMSTAGE__)

2
src/cpu/x86/64bit/mode_switch.S
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@ -44,7 +44,7 @@ protected_mode_call_wrapper:
movl %eax, %ebx movl %eax, %ebx
/* Preserves ebx */ /* Preserves ebx */
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
/* Place return value in rax */ /* Place return value in rax */
movl %ebx, %eax movl %ebx, %eax

2
src/cpu/x86/64bit/mode_switch2.S
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@ -21,7 +21,7 @@ long_mode_call_3arg:
mov %esp, %ebp mov %esp, %ebp
/* Enter long mode, preserves ebx */ /* Enter long mode, preserves ebx */
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
/* Align stack */ /* Align stack */
movabs $0xfffffffffffffff0, %rax movabs $0xfffffffffffffff0, %rax

2
src/cpu/x86/64bit/pt.S
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@ -18,7 +18,7 @@
#define _GEN_PAGE(a) (_PRES + _RW + _US + _PS + _A + _D + (a)) #define _GEN_PAGE(a) (_PRES + _RW + _US + _PS + _A + _D + (a))
.global PM4LE .global PM4LE
.align 32 .align 4096
PM4LE: PM4LE:
.quad _GEN_DIR(PDPE_table) .quad _GEN_DIR(PDPE_table)

5
src/mainboard/emulation/qemu-i440fx/Kconfig
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@ -30,6 +30,11 @@ config VBOOT
select GBB_FLAG_DISABLE_FWMP select GBB_FLAG_DISABLE_FWMP
if ARCH_BOOTBLOCK_X86_64 if ARCH_BOOTBLOCK_X86_64
config PAGE_TABLES_IN_CBFS
bool
default y
# Need to install page tables in DRAM as the virtual MMU has problems translating paging # Need to install page tables in DRAM as the virtual MMU has problems translating paging
# request when the page table resides in emulated ROM. This causes undefined behaviour # request when the page table resides in emulated ROM. This causes undefined behaviour
# when handling data requests, as well as fetching and decoding instructions # when handling data requests, as well as fetching and decoding instructions

5
src/mainboard/emulation/qemu-q35/Kconfig
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@ -32,6 +32,11 @@ config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwab-16M.fmd" if VBOOT_SLOTS_RW_AB default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwab-16M.fmd" if VBOOT_SLOTS_RW_AB
if ARCH_BOOTBLOCK_X86_64 if ARCH_BOOTBLOCK_X86_64
config PAGE_TABLES_IN_CBFS
bool
default y
# Need to install page tables in DRAM as the virtual MMU has problems translating paging # Need to install page tables in DRAM as the virtual MMU has problems translating paging
# request when the page table resides in emulated ROM. This causes undefined behaviour # request when the page table resides in emulated ROM. This causes undefined behaviour
# when handling data requests, as well as fetching and decoding instructions # when handling data requests, as well as fetching and decoding instructions

2
src/soc/amd/common/block/cpu/noncar/pre_c.S
View File

@ -28,7 +28,7 @@ bootblock_pre_c_entry:
post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY) post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY)
#if ENV_X86_64 #if ENV_X86_64
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
#endif #endif
/* Clear .bss section */ /* Clear .bss section */

2
src/soc/intel/common/block/cpu/car/cache_as_ram.S
View File

@ -280,7 +280,7 @@ car_init_done:
andl $0xfffffff0, %esp andl $0xfffffff0, %esp
#if ENV_X86_64 #if ENV_X86_64
setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) setup_longmode $PM4LE
movd %mm2, %rdi movd %mm2, %rdi
shlq $32, %rdi shlq $32, %rdi