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soc/amd/mendocino: PSP_INCLUDES_HSP

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Select HSP config to indicate that the SoC includes Hardware Security
Processor. This will allow PSP verstage to get and report the HSP state.

BUG=None
TEST=Build Skyrim BIOS image and boot to ChromeOS on Skyrim.  Verify
that HSP is reported during the boot sequence.

Change-Id: I22446c2bd6202529367da040c09449e6b26f9d7a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Karthikeyan Ramasubramanian
2022-12-22 13:07:28 -07:00
committed by Martin L Roth
parent e5f627ab85
commit ef1297689d
6 changed files with 25 additions and 37 deletions
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9
src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h
View File

@@ -343,15 +343,6 @@ uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size);
-----------------------------------------------------------------------------*/
uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode);
/* Get the previous boot status.
*
* Parameters:
* - boot_status - Address where the boot status is read into
*
* Return value: BL_OK or error code
*/
uint32_t svc_get_prev_boot_status(uint32_t *boot_status);
/* C entry point for the Bootloader Userspace Application */
void Main(void);

9
src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h
View File

@@ -410,15 +410,6 @@ static inline uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t
return BL_ERR_UNSUPPORTED_PLATFORM;
}
/* Get the previous boot status.
*
* Parameters:
* - boot_status - Address where the boot status is read into
*
* Return value: BL_OK or error code
*/
uint32_t svc_get_prev_boot_status(uint32_t *boot_status);
/* C entry point for the Bootloader Userspace Application */
void Main(void);