soc/amd/mendocino: PSP_INCLUDES_HSP
Select HSP config to indicate that the SoC includes Hardware Security Processor. This will allow PSP verstage to get and report the HSP state. BUG=None TEST=Build Skyrim BIOS image and boot to ChromeOS on Skyrim. Verify that HSP is reported during the boot sequence. Change-Id: I22446c2bd6202529367da040c09449e6b26f9d7a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
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Martin L Roth
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@ -343,15 +343,6 @@ uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size);
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-----------------------------------------------------------------------------*/
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uint32_t svc_set_platform_boot_mode(enum chrome_platform_boot_mode boot_mode);
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/* Get the previous boot status.
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*
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* Parameters:
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* - boot_status - Address where the boot status is read into
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*
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* Return value: BL_OK or error code
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*/
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uint32_t svc_get_prev_boot_status(uint32_t *boot_status);
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/* C entry point for the Bootloader Userspace Application */
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void Main(void);
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@ -410,15 +410,6 @@ static inline uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t
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return BL_ERR_UNSUPPORTED_PLATFORM;
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}
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/* Get the previous boot status.
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*
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* Parameters:
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* - boot_status - Address where the boot status is read into
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*
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* Return value: BL_OK or error code
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*/
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uint32_t svc_get_prev_boot_status(uint32_t *boot_status);
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/* C entry point for the Bootloader Userspace Application */
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void Main(void);
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