From ef47212bf8d1611d27d793e52fc64ca8286cfd5a Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 16 Feb 2022 18:44:09 +0530 Subject: [PATCH] mb/google/brya/var/{redrix, redrix4es}: Use ACPI _PLD macro This patch uses ACPI _PLD macros for USB Type A and C ports. BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Subrata Banik Change-Id: I61f8f39ce7651d499756f4975840f32f89b04ca7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61829 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- .../brya/variants/redrix/overridetree.cb | 42 +++---------------- .../brya/variants/redrix4es/overridetree.cb | 42 +++---------------- 2 files changed, 12 insertions(+), 72 deletions(-) diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 626805655b..af7f752ad3 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -474,24 +474,14 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_LEFT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(1, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(2, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port3 on end end end @@ -504,24 +494,14 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_LEFT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(1, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(2, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi @@ -538,12 +518,7 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-A Port (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(3, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port9 on end end chip drivers/usb/acpi @@ -557,12 +532,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-A Port (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(3, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb3_port1 on end end chip drivers/usb/acpi diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb index 3e30ac7078..22a9883374 100644 --- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb @@ -460,24 +460,14 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_LEFT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(1, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(2, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port3 on end end end @@ -490,24 +480,14 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_LEFT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(1, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_OVAL, - .group = ACPI_PLD_GROUP(2, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi @@ -524,12 +504,7 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-A Port (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(3, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port9 on end end chip drivers/usb/acpi @@ -543,12 +518,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-A Port (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "{ - .visible = true, - .panel = PLD_PANEL_RIGHT, - .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT, - .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE, - .group = ACPI_PLD_GROUP(3, 1)}" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb3_port1 on end end chip drivers/usb/acpi