soc/intel/apollolake: Add PM methods to power gate PCIe

This implements GNVS variable to store the address of PERST_0,
_ON/_OFF methods to power gate PCIe during S0ix entry, and
PERST_0 assertion/de-assertion methods.

BUG=chrome-os-partner:55877
TEST=Suspend and resume using 'echo freeze > /sys/power/state'.
System should resume with PCIE and wifi functional.

Change-Id: I9f63ca0b8a6565b6d21deaa6d3dfa34678714c19
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/16351
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/soc/intel/apollolake/acpi.c

@@ -29,6 +29,7 @@
 #include <soc/nvs.h>
 #include <soc/pci_devs.h>
 #include <string.h>
+#include <soc/gpio.h>
 #include "chip.h"
 
 #define CSTATE_RES(address_space, width, offset, address)		\
@@ -175,6 +176,10 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs)
 
 	/* Enable DPTF based on mainboard configuration */
 	gnvs->dpte = cfg->dptf_enable;
+
+	/* Assign address of PERST_0 if GPIO is defined in devicetree */
+	if (cfg->prt0_gpio != GPIO_PRT0_UDEF)
+		gnvs->prt0 = (uintptr_t)gpio_dwx_address(cfg->prt0_gpio);
 }
 
 /* Save wake source information for calculating ACPI _SWS values */