soc/amd: Clarify ACPI _PRT entry generation

The reference to a constant FCH IOAPIC interrupt count used
with GNB IOAPIC was a bit obscure.

Change-Id: I2d862e37424f9fea7f269cd09e9e90056531b643
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki
2023-04-09 13:47:28 +03:00
parent d1534e41e4
commit ef9c2922d2
2 changed files with 6 additions and 5 deletions

View File

@@ -5,7 +5,6 @@
#define IO_APIC_ADDR 0xfec00000
#define VIO_APIC_VADDR ((u8 *)IO_APIC_ADDR)
#define IO_APIC_INTERRUPTS 24
#ifndef __ACPI__