arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time
According to util/kbc1126/README.md, for these ECs to work, the address and size of their two firmware should be written to $s-0x100` (`$s` means the image size, done with kbc1126_ec_insert), which means that every existing section (especially those used to store code) should not overlap this address, otherwise the bootblock will get damaged when inserting firmwares of the EC. In this commit, ecfw_ptr is a structure initialized at build time according to CONFIG_KBC1126_FW1_OFFSET and CONFIG_KBC1126_FW2_OFFSET (to do so, they should be redefined as hex), and linked to CONFIG_ECFW_PTR_ADDR within bootblock, so kbc1126_ec_insert is not needed at build time any more. Test passed on Elitebook Folio 9470m. Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@@ -27,6 +27,12 @@ config KBC1126_FIRMWARE
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Select this option to add the two firmware blobs for KBC1126.
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You need these two blobs to power on your machine.
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config ECFW_PTR_ADDR
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default 0xffffff00
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config ECFW_PTR_SIZE
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default 8
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config KBC1126_FW1
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string "KBC1126 firmware #1 path and filename"
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depends on KBC1126_FIRMWARE
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@@ -37,9 +43,9 @@ config KBC1126_FW1
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vendor firmware.
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config KBC1126_FW1_OFFSET
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string "Offset of KBC1126 firmware #1"
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hex "Offset of KBC1126 firmware #1"
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depends on KBC1126_FIRMWARE
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default "0xfffe8000"
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default 0xfffe8000
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config KBC1126_FW2
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string "KBC1126 filename #2 path and filename"
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@@ -51,8 +57,8 @@ config KBC1126_FW2
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vendor firmware.
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config KBC1126_FW2_OFFSET
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string "Offset of KBC1126 firmware #2"
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hex "Offset of KBC1126 firmware #2"
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depends on KBC1126_FIRMWARE
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default "0xfffd0000"
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default 0xfffd0000
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endif
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@@ -1,7 +1,8 @@
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## SPDX-License-Identifier: GPL-2.0-only
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ifeq ($(CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS),y)
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KBC1126_EC_INSERT:=$(top)/util/kbc1126/kbc1126_ec_insert
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bootblock-y += ecfw_ptr.c
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ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
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cbfs-files-y += ecfw1.bin
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@@ -16,15 +17,6 @@ ecfw2.bin-position := $(CONFIG_KBC1126_FW2_OFFSET)
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ecfw2.bin-type := raw
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endif
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$(call add_intermediate, kbc1126_ec_insert)
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ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
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printf " Building kbc1126_ec_insert.\n"
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$(MAKE) -C util/kbc1126
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printf " KBC1126 Inserting KBC1126 firmware blobs.\n"
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$(KBC1126_EC_INSERT) $(obj)/coreboot.pre \
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$(CONFIG_KBC1126_FW1_OFFSET) $(CONFIG_KBC1126_FW2_OFFSET)
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endif
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build_complete::
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ifeq ($(CONFIG_KBC1126_FIRMWARE),)
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printf "\n** WARNING **\n"
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16
src/ec/hp/kbc1126/ecfw_ptr.c
Normal file
16
src/ec/hp/kbc1126/ecfw_ptr.c
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@@ -0,0 +1,16 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <endian.h>
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#include "ecfw_ptr.h"
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/*
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* Address info for EC SMSC KBC1098/KBC1126 to find their firmware blobs,
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* linked to CONFIG_ECFW_PTR_ADDR via src/arch/x86/bootblock.ld
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*/
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__attribute__((used, __section__(".ecfw_ptr")))
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const struct ecfw_ptr ecfw_ptr = {
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.fw1.off = cpu_to_be16((uint16_t)(CONFIG_KBC1126_FW1_OFFSET >> 8)),
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.fw1.inv = cpu_to_be16((uint16_t)~(CONFIG_KBC1126_FW1_OFFSET >> 8)),
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.fw2.off = cpu_to_be16((uint16_t)(CONFIG_KBC1126_FW2_OFFSET >> 8)),
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.fw2.inv = cpu_to_be16((uint16_t)~(CONFIG_KBC1126_FW2_OFFSET >> 8)),
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};
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20
src/ec/hp/kbc1126/ecfw_ptr.h
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20
src/ec/hp/kbc1126/ecfw_ptr.h
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@@ -0,0 +1,20 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _EC_HP_KBC1126_PTR_H
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#define _EC_HP_KBC1126_PTR_H
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#include <stdint.h>
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struct __attribute__((__packed__)) ecfw_addr {
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/* 8-byte offset of firmware blob in big endian */
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uint16_t off;
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/* bitwise inverse of "off", for error checking */
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uint16_t inv;
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};
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struct __attribute__((__packed__)) ecfw_ptr {
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struct ecfw_addr fw1;
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struct ecfw_addr fw2;
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};
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#endif
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