soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver

This change uses the newly added meminit block driver and updates TGL
SoC and mainboard code accordingly.

TEST=Verified that UPDs are configured correctly with and without this
change.

Change-Id: I6d58cd6568b7bbe03c4e3011b2301209893e85a9
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Furquan Shaikh
2020-12-31 21:15:34 -08:00
committed by Patrick Georgi
parent 859ca18ced
commit f06d046c10
25 changed files with 880 additions and 1204 deletions

View File

@@ -54,6 +54,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_MEMINIT
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM
@@ -250,4 +251,16 @@ config EARLY_TCSS_DISPLAY
help
Enable displays to be detected over Type-C ports during boot.
config DATA_BUS_WIDTH
int
default 128
config DIMMS_PER_CHANNEL
int
default 2
config MRC_CHANNEL_WIDTH
int
default 16
endif