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soc/amd/common/block/cpu/mca/mcax: add comment about McaXEnable bit

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TEST=Checked on amd/mandolin with PCO APU and google/guybrush with CZN
APU that the McaXEnable bit is set in the CONFIG registers of all used
MCAX banks.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia4515ba529e758f910d1d135cdce819f83ea0b5c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56535
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Felix Held
2021-07-22 23:11:11 +02:00
parent 5a2feeda39
commit f070253659
1 changed files with 3 additions and 0 deletions
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src/soc/amd/common/block/cpu/mca/mcax.c
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@@ -7,6 +7,9 @@
#include <types.h> #include <types.h>
#include "mca_common_defs.h" #include "mca_common_defs.h"
/* The McaXEnable bit in the config registers of the available MCAX banks is already set by the
FSP, so no need to set it here again. */
bool mca_skip_check(void) bool mca_skip_check(void)
{ {
/* On Zen-based CPUs/APUs the MCA(X) status register have a defined state even in the /* On Zen-based CPUs/APUs the MCA(X) status register have a defined state even in the