mb/google/slippy: Put GPIOs in a C file
This will allow dropping the pointer inside romstage_params. Change-Id: Iec6dac1a271b22d6c09b4064a9e8a310e57026a6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
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@ -7,6 +7,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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smm-y += smihandler.c
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smm-y += smihandler.c
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romstage-y += variants/$(VARIANT_DIR)/gpio.c
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romstage-y += variants/$(VARIANT_DIR)/romstage.c
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romstage-y += variants/$(VARIANT_DIR)/romstage.c
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subdirs-y += variants/$(VARIANT_DIR)
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subdirs-y += variants/$(VARIANT_DIR)
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@ -5,8 +5,11 @@
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#include <northbridge/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include "variant.h"
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#include "variant.h"
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extern const struct pch_lp_gpio_map mainboard_gpio_map[];
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void mainboard_config_rcba(void)
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void mainboard_config_rcba(void)
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{
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{
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/*
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/*
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@ -74,6 +77,7 @@ void mainboard_romstage_entry(void)
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struct romstage_params romstage_params = {
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struct romstage_params romstage_params = {
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.pei_data = &pei_data,
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.pei_data = &pei_data,
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.gpio_map = &mainboard_gpio_map,
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};
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};
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variant_romstage_entry(&romstage_params);
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variant_romstage_entry(&romstage_params);
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@ -1,9 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef FALCO_GPIO_H
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#define FALCO_GPIO_H
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struct pch_lp_gpio_map;
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 0: UNUSED */
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LP_GPIO_UNUSED, /* 0: UNUSED */
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@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_END
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LP_GPIO_END
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};
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};
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#endif
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@ -10,7 +10,6 @@
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#include <northbridge/intel/haswell/raminit.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <variant/gpio.h>
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#include "../../variant.h"
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#include "../../variant.h"
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/* Copy SPD data for on-board memory */
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/* Copy SPD data for on-board memory */
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@ -86,6 +85,5 @@ void variant_romstage_entry(struct romstage_params *rp)
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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rp->gpio_map = &mainboard_gpio_map;
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rp->copy_spd = copy_spd;
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rp->copy_spd = copy_spd;
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}
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}
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@ -1,9 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef LEON_GPIO_H
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#define LEON_GPIO_H
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struct pch_lp_gpio_map;
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 0: UNUSED */
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LP_GPIO_UNUSED, /* 0: UNUSED */
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@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_END
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LP_GPIO_END
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};
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};
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#endif
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@ -9,7 +9,6 @@
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#include <northbridge/intel/haswell/raminit.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <variant/gpio.h>
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#include "../../variant.h"
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#include "../../variant.h"
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/* Copy SPD data for on-board memory */
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/* Copy SPD data for on-board memory */
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@ -80,6 +79,5 @@ void variant_romstage_entry(struct romstage_params *rp)
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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rp->gpio_map = &mainboard_gpio_map;
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rp->copy_spd = copy_spd;
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rp->copy_spd = copy_spd;
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}
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}
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@ -1,9 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef PEPPY_GPIO_H
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#define PEPPY_GPIO_H
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struct pch_lp_gpio_map;
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 0: UNUSED */
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LP_GPIO_UNUSED, /* 0: UNUSED */
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@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_END
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LP_GPIO_END
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};
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};
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#endif
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@ -10,7 +10,6 @@
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#include <northbridge/intel/haswell/raminit.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <variant/gpio.h>
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#include "../../onboard.h"
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#include "../../onboard.h"
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#include "../../variant.h"
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#include "../../variant.h"
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@ -97,6 +96,5 @@ void variant_romstage_entry(struct romstage_params *rp)
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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rp->gpio_map = &mainboard_gpio_map;
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rp->copy_spd = copy_spd;
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rp->copy_spd = copy_spd;
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}
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}
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@ -1,9 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef WOLF_GPIO_H
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#define WOLF_GPIO_H
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struct pch_lp_gpio_map;
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 0: UNUSED */
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LP_GPIO_UNUSED, /* 0: UNUSED */
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@ -103,5 +100,3 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_UNUSED, /* 94: UNUSED */
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LP_GPIO_END
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LP_GPIO_END
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};
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};
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#endif
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@ -10,7 +10,6 @@
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#include <northbridge/intel/haswell/raminit.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <variant/gpio.h>
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#include "../../variant.h"
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#include "../../variant.h"
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/* Copy SPD data for on-board memory */
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/* Copy SPD data for on-board memory */
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@ -84,6 +83,5 @@ void variant_romstage_entry(struct romstage_params *rp)
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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memcpy(rp->pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
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rp->gpio_map = &mainboard_gpio_map;
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rp->copy_spd = copy_spd;
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rp->copy_spd = copy_spd;
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}
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}
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