crossgcc: Add RISC-V support

Change-Id: If1e0f7ed21f67d7a185dad251ede81ddbc18c4e5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8629
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

util/crossgcc/Makefile

@@ -1,4 +1,4 @@
-all: build-i386 build-armv7a build-aarch64 build-mips
+all: build-i386 build-armv7a build-aarch64 build-mips build-riscv
 
 build-i386:
 	bash ./buildgcc -G -p i386-elf
@@ -12,6 +12,9 @@ build-aarch64:
 build-mips:
 	bash ./buildgcc -G -p mips-elf
 
+build-mips:
+	bash ./buildgcc -G -p riscv-elf
+
 .PHONY: build-i386-without-gdb
 build-i386-without-gdb:
 	bash ./buildgcc -p i386-elf
@@ -28,6 +31,10 @@ build-aarch64-without-gdb:
 build-mips-without-gdb:
 	bash ./buildgcc -p mips-elf
 
+.PHONY: build-riscv-without-gdb
+build-riscv-without-gdb:
+	bash ./buildgcc -p riscv-elf
+
 clean:
 	rm -rf xgcc
 

util/crossgcc/buildgcc

@@ -230,6 +230,7 @@ case "$TARGETARCH" in
 	i386-elf)	;;
 	i386-mingw32)	;;
 	mipsel-elf)	;;
+	riscv-elf)	;;
 	i386*)		TARGETARCH=i386-elf;;
 	arm*)		TARGETARCH=armv7-a-eabi;;
 	aarch64*)	TARGETARCH=aarch64-elf;;