tegra124: Change all SoC headers to <soc/headername.h> system

This patch aligns tegra124 to the new SoC header include scheme.
Also alphabetized headers in affected files since we touch them anyway.

BUG=None
TEST=Tested with whole series. Compiled Nyan, Nyan_Big and Nyan_Blaze.

Change-Id: Ia82ab86b2af903690cc6c9d310f7bdda3425ea7c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4d23774e071ec22781991ff20fbf63802f620c88
Original-Change-Id: Ia126cff8590117788d1872e50608c257d2659c1f
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224504
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9326
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner
2014-10-20 13:24:14 -07:00
committed by Patrick Georgi
parent 73d1ed66d3
commit f0d21ff3da
72 changed files with 186 additions and 185 deletions

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@@ -17,10 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/gpio.h>
uint8_t board_id(void)
{

View File

@@ -22,12 +22,12 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/nvidia/tegra124/spi.h> /* FIXME: move back to soc code? */
#include <soc/pinmux.h>
#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"

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@@ -18,13 +18,13 @@
*/
#include <boot/coreboot_tables.h>
#include <bootmode.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <bootmode.h>
#include <soc/nvidia/tegra124/gpio.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{

View File

@@ -19,9 +19,9 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/early_configs.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/early_configs.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

View File

@@ -23,13 +23,13 @@
#include <boot/coreboot_tables.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/clk_rst.h>
#include <soc/gpio.h>
#include <soc/mc.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/mc.h>
#include <soc/nvidia/tegra124/pmc.h>
#include <soc/nvidia/tegra124/spi.h>
#include <soc/nvidia/tegra/usb.h>
#include <soc/pmc.h>
#include <soc/spi.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>

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@@ -1 +1 @@
#include <soc/nvidia/tegra124/memlayout.ld>
#include <soc/memlayout.ld>

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@@ -18,16 +18,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
#include <boardid.h>
#include "pmic.h"
#include <reset.h>
#include "pmic.h"
enum {
AS3722_I2C_ADDR = 0x40
};

View File

@@ -18,7 +18,7 @@
*/
#include <arch/io.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/gpio.h>
#include <reset.h>
void hard_reset(void)

View File

@@ -27,20 +27,21 @@
#include <reset.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/nvidia/tegra124/power.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/addressmap.h>
#include <soc/cache.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/power.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
static void __attribute__((noinline)) romstage(void)
{

View File

@@ -18,7 +18,8 @@
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
#include "sdram_configs.h"
static struct sdram_params sdram_configs[] = {

View File

@@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_NYAN_SDRAM_CONFIG_H__
#define __MAINBOARD_GOOGLE_NYAN_SDRAM_CONFIG_H__
#include <soc/nvidia/tegra124/sdram_param.h>
#include <soc/sdram_param.h>
/* Loads SDRAM configurations for current system. */
const struct sdram_params *get_sdram_config(void);

View File

@@ -17,11 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <stdlib.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <stdlib.h>
uint8_t board_id(void)
{

View File

@@ -22,12 +22,12 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/nvidia/tegra124/spi.h> /* FIXME: move back to soc code? */
#include <soc/pinmux.h>
#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"

View File

@@ -18,13 +18,13 @@
*/
#include <boot/coreboot_tables.h>
#include <bootmode.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <bootmode.h>
#include <soc/nvidia/tegra124/gpio.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{

View File

@@ -19,9 +19,9 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/early_configs.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/early_configs.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

View File

@@ -18,17 +18,17 @@
*/
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <device/device.h>
#include <elog.h>
#include <boot/coreboot_tables.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/mc.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/mc.h>
#include <soc/nvidia/tegra124/pmc.h>
#include <soc/nvidia/tegra124/spi.h>
#include <soc/pmc.h>
#include <soc/spi.h>
#include <soc/nvidia/tegra/usb.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>

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@@ -1 +1 @@
#include <soc/nvidia/tegra124/memlayout.ld>
#include <soc/memlayout.ld>

View File

@@ -18,16 +18,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
#include <boardid.h>
#include "pmic.h"
#include <reset.h>
#include "pmic.h"
enum {
AS3722_I2C_ADDR = 0x40
};

View File

@@ -18,7 +18,7 @@
*/
#include <arch/io.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/gpio.h>
#include <reset.h>
void hard_reset(void)

View File

@@ -27,20 +27,21 @@
#include <reset.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/nvidia/tegra124/power.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/addressmap.h>
#include <soc/cache.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/power.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
static void __attribute__((noinline)) romstage(void)
{

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@@ -18,7 +18,8 @@
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
#include "sdram_configs.h"
static struct sdram_params sdram_configs[] = {

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@@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_NYAN_BIG_SDRAM_CONFIG_H__
#define __MAINBOARD_GOOGLE_NYAN_BIG_SDRAM_CONFIG_H__
#include <soc/nvidia/tegra124/sdram_param.h>
#include <soc/sdram_param.h>
/* Loads SDRAM configurations for current system. */
const struct sdram_params *get_sdram_config(void);

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@@ -17,11 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <stdlib.h>
#include <boardid.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <stdlib.h>
uint8_t board_id(void)
{

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@@ -22,12 +22,12 @@
#include <console/console.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/pinmux.h>
#include <soc/nvidia/tegra124/spi.h> /* FIXME: move back to soc code? */
#include <soc/pinmux.h>
#include <soc/spi.h> /* FIXME: move back to soc code? */
#include "pmic.h"

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@@ -21,9 +21,9 @@
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/nvidia/tegra124/gpio.h>
//enum {
// ACTIVE_LOW = 0,

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@@ -19,9 +19,9 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/gpio.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/early_configs.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

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@@ -18,18 +18,18 @@
*/
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <device/device.h>
#include <elog.h>
#include <boot/coreboot_tables.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/clk_rst.h>
#include <soc/gpio.h>
#include <soc/mc.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/nvidia/tegra124/mc.h>
#include <soc/nvidia/tegra124/pmc.h>
#include <soc/nvidia/tegra124/spi.h>
#include <soc/nvidia/tegra/usb.h>
#include <soc/pmc.h>
#include <soc/spi.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>

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@@ -1 +1 @@
#include <soc/nvidia/tegra124/memlayout.ld>
#include <soc/memlayout.ld>

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@@ -18,16 +18,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boardid.h>
#include <console/console.h>
#include <delay.h>
#include <device/i2c.h>
#include <stdint.h>
#include <stdlib.h>
#include <boardid.h>
#include "pmic.h"
#include <reset.h>
#include "pmic.h"
enum {
AS3722_I2C_ADDR = 0x40
};

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@@ -18,7 +18,7 @@
*/
#include <arch/io.h>
#include <soc/nvidia/tegra124/gpio.h>
#include <soc/gpio.h>
#include <reset.h>
void hard_reset(void)

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@@ -27,20 +27,21 @@
#include <reset.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/cache.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/nvidia/tegra124/clk_rst.h>
#include <soc/nvidia/tegra124/early_configs.h>
#include <soc/nvidia/tegra124/power.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/addressmap.h>
#include <soc/cache.h>
#include <soc/clk_rst.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/early_configs.h>
#include <soc/nvidia/tegra/i2c.h>
#include <soc/nvidia/tegra124/chip.h>
#include <soc/power.h>
#include <soc/sdram.h>
#include <symbols.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "sdram_configs.h"
static void __attribute__((noinline)) romstage(void)
{

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@@ -18,7 +18,8 @@
*/
#include <console/console.h>
#include <soc/nvidia/tegra124/sdram.h>
#include <soc/sdram.h>
#include "sdram_configs.h"
static struct sdram_params sdram_configs[] = {

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@@ -20,7 +20,7 @@
#ifndef __MAINBOARD_GOOGLE_NYAN_BLAZE_SDRAM_CONFIG_H__
#define __MAINBOARD_GOOGLE_NYAN_BLAZE_SDRAM_CONFIG_H__
#include <soc/nvidia/tegra124/sdram_param.h>
#include <soc/sdram_param.h>
/* Loads SDRAM configurations for current system. */
const struct sdram_params *get_sdram_config(void);