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Enable allocation of resources to device 1 on thunderbolt bus

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This commit is contained in:
Jeremy Soller
2019-10-09 16:28:18 -06:00
parent a22c00bc39
commit f0e552d664
2 changed files with 38 additions and 34 deletions
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1
src/device/pci_device.c
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@@ -1254,6 +1254,7 @@ static void pci_bridge_route(struct bus *link, scan_state state)
if (state == PCI_ROUTE_FINAL) { if (state == PCI_ROUTE_FINAL) {
pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd);
parent->subordinate = link->subordinate; parent->subordinate = link->subordinate;
printk(BIOS_DEBUG, "system76: pci_bridge_route: assigning link subordinate %d\n", link->subordinate);
} }
} }

71
src/drivers/thunderbolt/thunderbolt.c
View File

@@ -22,47 +22,50 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
// static void slot_dev_read_resources(struct device *dev) static void slot_dev_read_resources(struct device *dev)
// { {
// struct resource *resource; struct resource *resource;
//
// resource = new_resource(dev, 0x10); resource = new_resource(dev, 0x10);
// resource->size = 1 << 28; resource->size = 1 << 28;
// resource->align = 22; resource->align = 22;
// resource->gran = 22; resource->gran = 22;
// resource->limit = 0xffffffff; resource->limit = 0xffffffff;
// resource->flags |= IORESOURCE_MEM; resource->flags |= IORESOURCE_MEM;
//
// resource = new_resource(dev, 0x14); resource = new_resource(dev, 0x14);
// resource->size = 1 << 28; resource->size = 1 << 28;
// resource->align = 22; resource->align = 22;
// resource->gran = 22; resource->gran = 22;
// resource->limit = 0xffffffff; resource->limit = 0xffffffff;
// resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
//
// resource = new_resource(dev, 0x18); resource = new_resource(dev, 0x18);
// resource->size = 1 << 13; resource->size = 1 << 13;
// resource->align = 12; resource->align = 12;
// resource->gran = 12; resource->gran = 12;
// resource->limit = 0xffff; resource->limit = 0xffff;
// resource->flags |= IORESOURCE_IO; resource->flags |= IORESOURCE_IO;
// } }
//
// static struct device_operations slot_dev_ops = { static struct device_operations slot_dev_ops = {
// .read_resources = slot_dev_read_resources, .read_resources = slot_dev_read_resources,
// }; };
static void tbt_pciexp_scan_bridge(struct device *dev) { static void tbt_pciexp_scan_bridge(struct device *dev) {
printk(BIOS_DEBUG, "tbt_pciexp_scan_bridge %s\n", dev_path(dev)); printk(BIOS_DEBUG, "tbt_pciexp_scan_bridge %s: scan bridge\n", dev_path(dev));
/* Normal PCIe Scan */ /* Normal PCIe Scan */
pciexp_scan_bridge(dev); pciexp_scan_bridge(dev);
/* Add dummy slot to preserve resources */ /* Add dummy slot to preserve resources */
// struct device *slot; if (PCI_SLOT(dev->path.pci.devfn) == 1) {
// struct device_path slot_path = { .type = DEVICE_PATH_NONE }; printk(BIOS_DEBUG, "tbt_pciexp_scan_bridge %s: add dummy device\n", dev_path(dev));
// slot = alloc_dev(dev->link_list, &slot_path); struct device *slot;
// slot->ops = &slot_dev_ops; struct device_path slot_path = { .type = DEVICE_PATH_NONE };
slot = alloc_dev(dev->link_list, &slot_path);
slot->ops = &slot_dev_ops;
}
} }
static struct pci_operations pcie_ops = { static struct pci_operations pcie_ops = {