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soc/intel/broadwell: Drop unused PCH PCI device macros

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Get rid of several unused PCH PCI device macros. These macros expand to
a call to the `pcidev_path_on_root_debug()` function, which only exists
to debug bad code. If needed, these macros should be reimplemented with
the `pcidev_path_on_root()` function instead.

Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.

Change-Id: I366e064f3fe708b55fb381aee25b2795b1c61142
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Angel Pons
2021-06-15 14:25:35 +02:00
committed by Felix Held
parent a030dd6146
commit f117266986
1 changed files with 0 additions and 18 deletions
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18
src/soc/intel/broadwell/include/soc/pci_devs.h
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@@ -31,18 +31,12 @@
#define PCH_DEV_SLOT_ADSP 0x13
#define PCH_DEVFN_ADSP _PCH_DEVFN(ADSP, 0)
#define PCH_DEV_ADSP _PCH_DEV(ADSP, 0)
#define PCH_DEV_SLOT_XHCI 0x14
#define PCH_DEVFN_XHCI _PCH_DEVFN(XHCI, 0)
#define PCH_DEV_XHCI _PCH_DEV(XHCI, 0)
#define PCH_DEV_SLOT_SIO 0x15
#define PCH_DEV_SDMA _PCH_DEV(SIO, 0)
#define PCH_DEV_I2C0 _PCH_DEV(SIO, 1)
#define PCH_DEV_I2C1 _PCH_DEV(SIO, 2)
#define PCH_DEV_SPI0 _PCH_DEV(SIO, 3)
#define PCH_DEV_SPI1 _PCH_DEV(SIO, 4)
#define PCH_DEV_UART0 _PCH_DEV(SIO, 5)
#define PCH_DEV_UART1 _PCH_DEV(SIO, 6)
#define PCH_DEVFN_SDMA _PCH_DEVFN(SIO, 0)
@@ -59,27 +53,20 @@
#define PCH_DEVFN_ME_IDER _PCH_DEVFN(ME, 2)
#define PCH_DEVFN_ME_KT _PCH_DEVFN(ME, 3)
#define PCH_DEV_ME _PCH_DEV(ME, 0)
#define PCH_DEV_ME_2 _PCH_DEV(ME, 1)
#define PCH_DEV_ME_IDER _PCH_DEV(ME, 2)
#define PCH_DEV_ME_KT _PCH_DEV(ME, 3)
#define PCH_DEV_SLOT_SDIO 0x17
#define PCH_DEVFN_SDIO _PCH_DEVFN(SDIO, 0)
#define PCH_DEV_SDIO _PCH_DEV(SDIO, 0)
#define PCH_DEV_SLOT_GBE 0x19
#define PCH_DEVFN_GBE _PCH_DEVFN(GBE, 0)
#define PCH_DEV_GBE _PCH_DEV(GBE, 0)
#define PCH_DEV_SLOT_HDA 0x1b
#define PCH_DEVFN_HDA _PCH_DEVFN(HDA, 0)
#define PCH_DEV_HDA _PCH_DEV(HDA, 0)
#define PCH_DEV_SLOT_PCIE 0x1c
#define PCH_DEV_SLOT_EHCI 0x1d
#define PCH_DEVFN_EHCI _PCH_DEVFN(EHCI, 0)
#define PCH_DEV_EHCI _PCH_DEV(EHCI, 0)
#define PCH_DEV_SLOT_LPC 0x1f
#define PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0)
@@ -89,11 +76,6 @@
#define PCH_DEVFN_SATA2 _PCH_DEVFN(LPC, 5)
#define PCH_DEVFN_THERMAL _PCH_DEVFN(LPC, 6)
#define PCH_DEV_LPC _PCH_DEV(LPC, 0)
#define PCH_DEV_IDE _PCH_DEV(LPC, 1)
#define PCH_DEV_SATA _PCH_DEV(LPC, 2)
#define PCH_DEV_SMBUS _PCH_DEV(LPC, 3)
#define PCH_DEV_SATA2 _PCH_DEV(LPC, 5)
#define PCH_DEV_THERMAL _PCH_DEV(LPC, 6)
#define PCH_IOAPIC_PCI_BUS 250
#define PCH_IOAPIC_PCI_SLOT 31