device/pci: Fix PCI accessor headers

PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.

Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/soc/intel/apollolake/bootblock/bootblock.c

@@ -18,6 +18,7 @@
 #include <bootblock_common.h>
 #include <cpu/x86/pae.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/p2sb.h>

src/soc/intel/apollolake/chip.c

@@ -25,6 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/chip.h>
 #include <intelblocks/fast_spi.h>

src/soc/intel/apollolake/graphics.c

@@ -23,6 +23,7 @@
 #include <fsp/util.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <intelblocks/graphics.h>
 #include <drivers/intel/gma/opregion.h>
 #include <drivers/intel/gma/libgfxinit.h>

src/soc/intel/apollolake/romstage.c

@@ -19,6 +19,7 @@
 #include <arch/cpu.h>
 #include <arch/early_variables.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/symbols.h>
 #include <assert.h>
 #include <bootmode.h>

src/soc/intel/baytrail/bootblock/bootblock.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>

src/soc/intel/baytrail/chip.c

@@ -15,6 +15,7 @@
 
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <arch/pci_ops.h>
 
 #include <soc/pci_devs.h>

src/soc/intel/baytrail/gfx.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>

src/soc/intel/baytrail/iosf.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/iosf.h>
 
 #if !defined(__PRE_RAM__)

src/soc/intel/baytrail/lpe.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/baytrail/pcie.c

@@ -16,6 +16,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pciexp.h>
 #include <device/pci_ids.h>
 #include <reg_script.h>

src/soc/intel/baytrail/pmutil.c

@@ -16,6 +16,7 @@
 #include <stdint.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 

src/soc/intel/baytrail/romstage/gfx.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/gfx.h>
 #include <soc/pci_devs.h>
 #include <soc/romstage.h>

src/soc/intel/baytrail/romstage/pmc.c

@@ -15,6 +15,7 @@
 
 #include <stddef.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>

src/soc/intel/baytrail/romstage/raminit.c

@@ -21,6 +21,7 @@
 #include <cf9_reset.h>
 #include <console/console.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <halt.h>
 #include <mrc_cache.h>
 #include <soc/gpio.h>

src/soc/intel/baytrail/romstage/romstage.c

@@ -16,6 +16,7 @@
 #include <stddef.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <bootblock_common.h>
 #include <console/console.h>
 #include <cbmem.h>

src/soc/intel/baytrail/romstage/uart.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/gpio.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>

src/soc/intel/baytrail/sata.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 #include <soc/sata.h>

src/soc/intel/baytrail/sd.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/baytrail/smihandler.c

@@ -16,6 +16,7 @@
 #include <stdint.h>
 #include <stdlib.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>

src/soc/intel/baytrail/southcluster.c

@@ -17,6 +17,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <arch/cpu.h>
 #include <bootstate.h>

src/soc/intel/baytrail/spi.c

@@ -19,6 +19,7 @@
 #include <bootstate.h>
 #include <delay.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/baytrail/xhci.c

@@ -17,6 +17,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <stdint.h>
 #include <reg_script.h>

src/soc/intel/braswell/bootblock/bootblock.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>

src/soc/intel/braswell/chip.c

@@ -18,6 +18,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <fsp/util.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

src/soc/intel/braswell/iosf.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <soc/iosf.h>
 

src/soc/intel/braswell/lpe.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/braswell/pcie.c

@@ -18,6 +18,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pciexp.h>
 #include <device/pci_ids.h>
 #include <reg_script.h>

src/soc/intel/braswell/pmutil.c

@@ -16,6 +16,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <soc/iomap.h>

src/soc/intel/braswell/romstage/romstage.c

@@ -19,6 +19,7 @@
 #include <stddef.h>
 #include <arch/early_variables.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/cbfs.h>
 #include <chip.h>
 #include <cpu/x86/mtrr.h>

src/soc/intel/braswell/sd.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/braswell/smihandler.c

@@ -16,6 +16,7 @@
 
 #include <arch/hlt.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>

src/soc/intel/braswell/southcluster.c

@@ -17,6 +17,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <bootstate.h>

src/soc/intel/braswell/spi.c

@@ -15,6 +15,7 @@
 
 /* This file is derived from the flashrom project. */
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <bootstate.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>

src/soc/intel/broadwell/bootblock/pch.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>
 #include <soc/pci_devs.h>

src/soc/intel/broadwell/bootblock/systemagent.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
 

src/soc/intel/broadwell/chip.c

@@ -15,6 +15,7 @@
 
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <soc/acpi.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

src/soc/intel/broadwell/ehci.c

@@ -20,6 +20,7 @@
 #include <device/pci_ids.h>
 #include <device/pci_ehci.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/ehci.h>
 #include <soc/pch.h>
 

src/soc/intel/broadwell/igd.c

@@ -15,6 +15,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <bootmode.h>
 #include <console/console.h>
 #include <delay.h>

src/soc/intel/broadwell/lpc.c

@@ -24,6 +24,7 @@
 #include <pc80/i8259.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <cpu/cpu.h>

src/soc/intel/broadwell/me.c

@@ -23,6 +23,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/broadwell/me_status.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <stdlib.h>

src/soc/intel/broadwell/memmap.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <device/pci.h>
 #include <soc/pci_devs.h>

src/soc/intel/broadwell/pch.c

@@ -17,6 +17,7 @@
 #include <console/console.h>
 #include <delay.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_def.h>

src/soc/intel/broadwell/pmutil.c

@@ -20,6 +20,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_def.h>

src/soc/intel/broadwell/romstage/power_state.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/broadwell/romstage/report_platform.c

@@ -15,6 +15,7 @@
 
 #include <arch/cpu.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <string.h>

src/soc/intel/broadwell/romstage/systemagent.c

@@ -16,6 +16,7 @@
 
 #include <stdlib.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <reg_script.h>
 #include <soc/iomap.h>

src/soc/intel/broadwell/sata.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/broadwell/serialio.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/broadwell/smihandler.c

@@ -17,6 +17,7 @@
 #include <delay.h>
 #include <types.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <device/pci_def.h>

src/soc/intel/broadwell/smmrelocate.c

@@ -17,6 +17,7 @@
 #include <string.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>

src/soc/intel/broadwell/spi.c

@@ -19,6 +19,7 @@
 #include <commonlib/helpers.h>
 #include <delay.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/broadwell/systemagent.c

@@ -17,6 +17,7 @@
 #include <console/console.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <stdint.h>
 #include <delay.h>
 #include <device/device.h>

src/soc/intel/broadwell/xhci.c

@@ -19,6 +19,7 @@
 #include <device/pci_ids.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/ramstage.h>
 #include <soc/xhci.h>
 #include <soc/cpu.h>

src/soc/intel/cannonlake/bootblock/pch.c

@@ -16,6 +16,7 @@
 
 #include <console/console.h>
 #include <device/device.h>
+#include <device/pci_ops.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/gspi.h>
 #include <intelblocks/lpc_lib.h>

src/soc/intel/cannonlake/bootblock/report_platform.c

@@ -16,6 +16,7 @@
 
 #include <arch/cpu.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <device/pci.h>

src/soc/intel/cannonlake/graphics.c

@@ -19,6 +19,7 @@
 #include <fsp/util.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <drivers/intel/gma/i915_reg.h>
 #include <drivers/intel/gma/opregion.h>
 #include <intelblocks/graphics.h>

src/soc/intel/cannonlake/lpc.c

@@ -22,6 +22,7 @@
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <intelblocks/itss.h>
 #include <intelblocks/lpc_lib.h>

src/soc/intel/cannonlake/smmrelocate.c

@@ -18,6 +18,7 @@
 #include <string.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/lapic.h>

src/soc/intel/common/block/i2c/i2c.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/i2c_simple.h>

src/soc/intel/common/block/lpc/lpc_lib.c

@@ -20,6 +20,7 @@
 #include <assert.h>
 #include <console/console.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <intelblocks/lpc_lib.h>
 #include <lib.h>
 #include "lpc_def.h"

src/soc/intel/common/block/p2sb/p2sb.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/common/block/pmc/pmc.c

@@ -15,6 +15,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <device/pci.h>

src/soc/intel/common/block/sata/sata.c

@@ -15,6 +15,7 @@
 
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <soc/pci_devs.h>

src/soc/intel/common/block/smbus/tco.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_def.h>

src/soc/intel/common/block/smm/smihandler.c

@@ -16,6 +16,7 @@
 
 #include <arch/hlt.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>

src/soc/intel/common/block/systemagent/systemagent.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/common/block/systemagent/systemagent_early.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/denverton_ns/acpi.c

@@ -24,6 +24,7 @@
 #include <cpu/x86/smm.h>
 #include <string.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 
 #include <intelblocks/acpi.h>

src/soc/intel/denverton_ns/bootblock/uart.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <fsp/soc_binding.h>
 #include <commonlib/helpers.h>

src/soc/intel/denverton_ns/chip.c

@@ -21,6 +21,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
 #include <intelblocks/fast_spi.h>

src/soc/intel/denverton_ns/lpc.c

@@ -19,6 +19,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <cpu/x86/smm.h>

src/soc/intel/denverton_ns/pmc.c

@@ -16,6 +16,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/denverton_ns/romstage.c

@@ -18,6 +18,7 @@
 #include <cf9_reset.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>
+#include <device/pci_ops.h>
 #include <soc/fiamux.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>

src/soc/intel/denverton_ns/sata.c

@@ -16,6 +16,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/denverton_ns/smihandler.c

@@ -19,6 +19,7 @@
 #include <stdlib.h>
 #include <arch/hlt.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>

src/soc/intel/denverton_ns/soc_util.c

@@ -16,6 +16,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci.h>
 #include <device/pci_def.h>
 #include <device/device.h>

src/soc/intel/denverton_ns/systemagent.c

@@ -18,6 +18,7 @@
 #include <console/console.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <stdint.h>
 #include <delay.h>
 #include <device/device.h>

src/soc/intel/denverton_ns/uart.c

@@ -23,6 +23,7 @@
 #include <console/uart.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <soc/pci_devs.h>
 #include <console/console.h>

src/soc/intel/denverton_ns/uart_debug.c

@@ -16,8 +16,8 @@
 
 #include <stdint.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <io.h>
-#include <arch/pci_io_cfg.h>
 #include <soc/uart.h>
 
 #define MY_PCI_DEV(SEGBUS, DEV, FN) \

src/soc/intel/denverton_ns/xhci.c

@@ -19,6 +19,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

src/soc/intel/fsp_baytrail/acpi.c

@@ -38,6 +38,7 @@
 #include <soc/irq.h>
 #include <soc/iosf.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/msr.h>
 #include <soc/pattrs.h>
 #include <cbmem.h>

src/soc/intel/fsp_baytrail/bootblock/bootblock.c

@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>

src/soc/intel/fsp_baytrail/chip.c

@@ -16,6 +16,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>

src/soc/intel/fsp_baytrail/i2c.c

@@ -14,6 +14,7 @@
  */
 
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <soc/baytrail.h>
 #include <soc/pci_devs.h>
 #include <soc/iosf.h>

src/soc/intel/fsp_baytrail/iosf.c

@@ -16,6 +16,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/iosf.h>
 
 #if !defined(__PRE_RAM__)

src/soc/intel/fsp_baytrail/lpe.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/fsp_baytrail/pmutil.c

@@ -15,6 +15,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cbmem.h>
 #include <console/console.h>
 

src/soc/intel/fsp_baytrail/romstage/report_platform.c

@@ -16,6 +16,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/iosf.h>
 #include <soc/romstage.h>
 #include <cpu/x86/msr.h>

src/soc/intel/fsp_baytrail/romstage/romstage.c

@@ -17,6 +17,7 @@
 #include <stddef.h>
 #include <lib.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/cbfs.h>
 #include <arch/early_variables.h>
 #include <console/console.h>

src/soc/intel/fsp_baytrail/romstage/uart.c

@@ -14,6 +14,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/gpio.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>

src/soc/intel/fsp_baytrail/smihandler.c

@@ -16,6 +16,7 @@
 #include <stdint.h>
 #include <stdlib.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>

src/soc/intel/fsp_baytrail/southcluster.c

@@ -18,6 +18,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <console/console.h>
 #include <device/device.h>

src/soc/intel/fsp_baytrail/spi.c

@@ -21,6 +21,7 @@
 #include <commonlib/helpers.h>
 #include <delay.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/fsp_broadwell_de/acpi.c

@@ -21,6 +21,7 @@
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/smp/mpspec.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>

src/soc/intel/fsp_broadwell_de/chip.c

@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

src/soc/intel/fsp_broadwell_de/romstage/romstage.c

@@ -18,6 +18,7 @@
 #include <stddef.h>
 #include <lib.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <arch/cbfs.h>
 #include <cbmem.h>
 #include <console/console.h>

src/soc/intel/fsp_broadwell_de/smmrelocate.c

@@ -25,6 +25,7 @@
 #include <cpu/x86/smm.h>
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <soc/lpc.h>
 #include <soc/msr.h>
 #include <soc/pci_devs.h>

src/soc/intel/fsp_broadwell_de/southcluster.c

@@ -18,6 +18,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/fsp_broadwell_de/vtd.c

@@ -14,6 +14,7 @@
  */
 
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <soc/pci_devs.h>
 #include <soc/acpi.h>