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intel/fsp_baytrail: Support Baytrail FSP Gold4 release

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Baytrail FSP Gold4 release added 5 PCD options. Update UPD_DATA_REGION
structure to include these new PCD options and initialized the setting
when given in devicetree.cb.

Change-Id: Ic343e79479464972455e42f9352b3bb116c6f80f
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/10838
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
This commit is contained in:
York Yang
2015-07-07 11:09:02 -07:00
committed by Stefan Reinauer
parent d9c7a7b4da
commit f226a4d41d
3 changed files with 45 additions and 3 deletions
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7
src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
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@ -97,7 +97,12 @@ typedef struct _UPD_DATA_REGION {
UINT8 PcdSccEnablePciMode; /* Offset 0x004D */
UINT8 IgdRenderStandby; /* Offset 0x004E */
UINT8 TxeUmaEnable; /* Offset 0x004F */
UINT8 UnusedUpdSpace1[160]; /* Offset 0x0050 */
UINT8 PcdOsSelection; /* Offset 0x0050 */
UINT8 PcdEMMC45DDR50Enabled; /* Offset 0x0051 */
UINT8 PcdEMMC45HS200Enabled; /* Offset 0x0052 */
UINT8 PcdEMMC45RetuneTimerValue; /* Offset 0x0053 */
UINT8 PcdEnableIgd; /* Offset 0x0054 */
UINT8 UnusedUpdSpace1[155]; /* Offset 0x0055 */
MEMORY_DOWN_DATA PcdMemoryParameters; /* Offset 0x00F0 */
UINT16 PcdRegionTerminator; /* Offset 0x0100 */
} UPD_DATA_REGION;