Add support for the AMD/ATI SB600 southbridge SPI functionality.
This has been tested by Uwe Hermann on an RS690/SB600 board. Signed-off-by: Jason Wang <Qingpei.Wang@amd.com> Reviewed-by: Joe Bao <zheng.bao@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -42,6 +42,8 @@ int spi_command(unsigned int writecnt, unsigned int readcnt,
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case BUS_TYPE_ICH9_SPI:
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case BUS_TYPE_VIA_SPI:
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return ich_spi_command(writecnt, readcnt, writearr, readarr);
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case BUS_TYPE_SB600_SPI:
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return sb600_spi_command(writecnt, readcnt, writearr, readarr);
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default:
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printf_debug
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("%s called, but no SPI chipset/strapping detected\n",
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@ -157,6 +159,7 @@ int probe_spi_rdid4(struct flashchip *flash)
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case BUS_TYPE_ICH7_SPI:
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case BUS_TYPE_ICH9_SPI:
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case BUS_TYPE_VIA_SPI:
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case BUS_TYPE_SB600_SPI:
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return probe_spi_rdid_generic(flash, 4);
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default:
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printf_debug("4b ID not supported on this SPI controller\n");
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@ -229,7 +232,13 @@ uint8_t spi_read_status_register()
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unsigned char readarr[JEDEC_RDSR_INSIZE];
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/* Read Status Register */
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spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
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if (flashbus == BUS_TYPE_SB600_SPI) {
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/* SB600 uses a different way to read status register. */
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return sb600_read_status_register();
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} else {
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spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
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}
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return readarr[0];
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}
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@ -464,6 +473,14 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
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return 0;
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}
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int spi_write_status_enable()
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{
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const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
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/* Send EWSR (Enable Write Status Register). */
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return spi_command(JEDEC_EWSR_OUTSIZE, JEDEC_EWSR_INSIZE, cmd, NULL);
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}
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/*
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* This is according the SST25VF016 datasheet, who knows it is more
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* generic that this...
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@ -500,9 +517,9 @@ int spi_disable_blockprotect(void)
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/* If there is block protection in effect, unprotect it first. */
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if ((status & 0x3c) != 0) {
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printf_debug("Some block protection in effect, disabling\n");
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result = spi_write_enable();
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result = spi_write_status_enable();
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if (result) {
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printf_debug("spi_write_enable failed\n");
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printf_debug("spi_write_status_enable failed\n");
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return result;
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}
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result = spi_write_status_register(status & ~0x3c);
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@ -532,6 +549,8 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf)
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switch (flashbus) {
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case BUS_TYPE_IT87XX_SPI:
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return it8716f_spi_chip_read(flash, buf);
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case BUS_TYPE_SB600_SPI:
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return sb600_spi_read(flash, buf);
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case BUS_TYPE_ICH7_SPI:
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case BUS_TYPE_ICH9_SPI:
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case BUS_TYPE_VIA_SPI:
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@ -550,6 +569,8 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf)
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switch (flashbus) {
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case BUS_TYPE_IT87XX_SPI:
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return it8716f_spi_chip_write(flash, buf);
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case BUS_TYPE_SB600_SPI:
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return sb600_spi_write(flash, buf);
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case BUS_TYPE_ICH7_SPI:
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case BUS_TYPE_ICH9_SPI:
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case BUS_TYPE_VIA_SPI:
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