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nb/intel/i945: Use parallel MP init

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Use the parallel mp init path to initialize AP's. This should result
in a moderate speedup.

Tested on Intel D945GCLF (1 core 2 threads), still boots fine and is
26ms faster compared to lapic_cpu_init.

This removes the option to disable HT siblings.

Change-Id: I955551b99e9cbc397f99c2a6bd355c6070390bcb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/25600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
This commit is contained in:
Arthur Heymans
2018-04-10 15:15:05 +02:00
committed by Patrick Georgi
parent 6336d4c48d
commit f266932836
29 changed files with 22 additions and 61 deletions
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1
src/cpu/intel/model_106cx/Makefile.inc
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@@ -2,5 +2,6 @@ ramstage-y += model_106cx_init.c
subdirs-y += ../../x86/name
subdirs-y += ../common
subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin

12
src/cpu/intel/model_106cx/model_106cx_init.c
View File

@@ -85,15 +85,18 @@ static void model_106cx_init(struct device *cpu)
x86_enable_cache();
/* Update the microcode */
intel_update_microcode_from_cbfs();
if (!IS_ENABLED(CONFIG_PARALLEL_MP))
intel_update_microcode_from_cbfs();
/* Print processor name */
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Setup MTRRs */
x86_setup_mtrrs();
x86_mtrr_check();
if (!IS_ENABLED(CONFIG_PARALLEL_MP)) {
x86_setup_mtrrs();
x86_mtrr_check();
}
/* Enable the local CPU APICs */
setup_lapic();
@@ -110,7 +113,8 @@ static void model_106cx_init(struct device *cpu)
/* TODO: PIC thermal sensor control */
/* Start up my CPU siblings */
intel_sibling_init(cpu);
if (!IS_ENABLED(CONFIG_PARALLEL_MP))
intel_sibling_init(cpu);
}
static struct device_operations cpu_dev_ops = {