soc/intel/skylake: Expand USB OC pins definition to support PCH-H
Currently the USB OC pins definition only being defined up to OC3. For PCH-H, OC4 and OC5 are needed, so add both into OC pin enum. Changes is being verified and booted to Yocto with Saddle Brook. Change-Id: Idaed6fa7dcddb9c688966e8bc59f656aec2b26eb Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com> Reviewed-on: https://review.coreboot.org/18364 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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						Martin Roth
					
				
			
			
				
	
			
			
			
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			@@ -51,6 +51,8 @@ enum {
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	OC1,
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						OC1,
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	OC2,
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						OC2,
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	OC3,
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						OC3,
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						OC4,
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						OC5,
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	OC_SKIP = 8, /* Skip OC programming */
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						OC_SKIP = 8, /* Skip OC programming */
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};
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					};
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