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src/mainboard: Remove unnecessary whitespace

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Change-Id: I35cb7e08d5233aa5a3dbb4631ab2ee4dc9596f98
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16849
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2016-10-02 10:09:11 +02:00 committed by Martin Roth
parent 028200f75f
commit f2fcf22d22
15 changed files with 40 additions and 34 deletions
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12
src/mainboard/amd/inagua/BiosCallOuts.c
View File

@ -151,13 +151,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) { switch (ResetInfo->ResetControl) {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
@ -167,13 +167,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) { switch (ResetInfo->ResetControl) {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
@ -183,13 +183,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) { switch (ResetInfo->ResetControl) {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;

4
src/mainboard/amd/persimmon/BiosCallOuts.c
View File

@ -76,13 +76,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) { switch (ResetInfo->ResetControl) {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8); Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8); Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;

12
src/mainboard/amd/south_station/BiosCallOuts.c
View File

@ -152,13 +152,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
{ {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
@ -169,13 +169,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
{ {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
@ -186,13 +186,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
{ {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;

12
src/mainboard/amd/union_station/BiosCallOuts.c
View File

@ -152,13 +152,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
{ {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
@ -169,13 +169,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
{ {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
@ -186,13 +186,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
{ {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;

4
src/mainboard/elmex/pcm205400/BiosCallOuts.c
View File

@ -76,13 +76,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) { switch (ResetInfo->ResetControl) {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
Data8 &= ~(UINT8)BIT6 ; Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8); Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8); Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;

3
src/mainboard/google/butterfly/mainboard.c
View File

@ -43,7 +43,8 @@ static unsigned int search(char *p, char *a, unsigned int lengthp,
/* Searching */ /* Searching */
for (j = 0; j <= lengtha - lengthp; j++) { for (j = 0; j <= lengtha - lengthp; j++) {
for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
;
if (i >= lengthp) if (i >= lengthp)
return j; return j;
} }

3
src/mainboard/google/guado/lan.c
View File

@ -31,7 +31,8 @@ static unsigned int search(char *p, u8 *a, unsigned int lengthp,
/* Searching */ /* Searching */
for (j = 0; j <= lengtha - lengthp; j++) { for (j = 0; j <= lengtha - lengthp; j++) {
for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
;
if (i >= lengthp) if (i >= lengthp)
return j; return j;
} }

3
src/mainboard/google/jecht/lan.c
View File

@ -31,7 +31,8 @@ static unsigned int search(char *p, u8 *a, unsigned int lengthp,
/* Searching */ /* Searching */
for (j = 0; j <= lengtha - lengthp; j++) { for (j = 0; j <= lengtha - lengthp; j++) {
for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
;
if (i >= lengthp) if (i >= lengthp)
return j; return j;
} }

3
src/mainboard/google/panther/lan.c
View File

@ -31,7 +31,8 @@ static unsigned int search(char *p, u8 *a, unsigned int lengthp,
/* Searching */ /* Searching */
for (j = 0; j <= lengtha - lengthp; j++) { for (j = 0; j <= lengtha - lengthp; j++) {
for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
;
if (i >= lengthp) if (i >= lengthp)
return j; return j;
} }

3
src/mainboard/google/rikku/lan.c
View File

@ -31,7 +31,8 @@ static unsigned int search(char *p, u8 *a, unsigned int lengthp,
/* Searching */ /* Searching */
for (j = 0; j <= lengtha - lengthp; j++) { for (j = 0; j <= lengtha - lengthp; j++) {
for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
;
if (i >= lengthp) if (i >= lengthp)
return j; return j;
} }

3
src/mainboard/google/tidus/lan.c
View File

@ -31,7 +31,8 @@ static unsigned int search(char *p, u8 *a, unsigned int lengthp,
/* Searching */ /* Searching */
for (j = 0; j <= lengtha - lengthp; j++) { for (j = 0; j <= lengtha - lengthp; j++) {
for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; for (i = 0; i < lengthp && p[i] == a[i + j]; i++)
;
if (i >= lengthp) if (i >= lengthp)
return j; return j;
} }

4
src/mainboard/intel/eagleheights/debug.c
View File

@ -150,7 +150,7 @@ static inline void dump_spd_registers(void)
int i; int i;
printk(BIOS_DEBUG, "\ndimm %02x", device); printk(BIOS_DEBUG, "\ndimm %02x", device);
for(i = 0; (i < 256) ; i++) { for(i = 0; (i < 256); i++) {
if ((i % 16) == 0) if ((i % 16) == 0)
printk(BIOS_DEBUG, "\n%02x: ", i); printk(BIOS_DEBUG, "\n%02x: ", i);
status = smbus_read_byte(device, i); status = smbus_read_byte(device, i);
@ -174,7 +174,7 @@ static inline void dump_ipmi_registers(void)
int i; int i;
printk(BIOS_DEBUG, "\nipmi %02x", device); printk(BIOS_DEBUG, "\nipmi %02x", device);
for(i = 0; (i < 8) ; i++) { for(i = 0; (i < 8); i++) {
status = smbus_read_byte(device, 2); status = smbus_read_byte(device, 2);
if (status < 0) { if (status < 0) {
printk(BIOS_DEBUG, "bad device: %d\n", -status); printk(BIOS_DEBUG, "bad device: %d\n", -status);

4
src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c
View File

@ -79,13 +79,13 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi
switch (ResetInfo->ResetControl) { switch (ResetInfo->ResetControl) {
case AssertSlotReset: case AssertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
Data8 &= ~(uint8_t)BIT6 ; Data8 &= ~(uint8_t)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8); Write64Mem8(GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;
case DeassertSlotReset: case DeassertSlotReset:
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50); Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG50);
Data8 |= BIT6 ; Data8 |= BIT6;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8); Write64Mem8 (GpioMmioAddr+SB_GPIO_REG50, Data8);
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;
break; break;

2
src/mainboard/lippert/frontrunner-af/mainboard.c
View File

@ -78,7 +78,7 @@ static int smb_write_blk(u8 slave, u8 command, u8 length, const u8 *data)
__outbyte(SMB0_BLOCKDATA, *(data++)); __outbyte(SMB0_BLOCKDATA, *(data++));
__outbyte(SMB0_CONTROL, 0x54); // execute block write, no IRQ __outbyte(SMB0_CONTROL, 0x54); // execute block write, no IRQ
while (__inbyte(SMB0_STATUS) == 0x01) ; // busy, no errors while (__inbyte(SMB0_STATUS) == 0x01); // busy, no errors
return __inbyte(SMB0_STATUS) ^ 0x02; // 0x02 = completed, no errors return __inbyte(SMB0_STATUS) ^ 0x02; // 0x02 = completed, no errors
} }

2
src/mainboard/lippert/toucan-af/mainboard.c
View File

@ -47,7 +47,7 @@ static int smb_write_blk(u8 slave, u8 command, u8 length, const u8 *data)
__outbyte(SMB0_BLOCKDATA, *(data++)); __outbyte(SMB0_BLOCKDATA, *(data++));
__outbyte(SMB0_CONTROL, 0x54); // execute block write, no IRQ __outbyte(SMB0_CONTROL, 0x54); // execute block write, no IRQ
while (__inbyte(SMB0_STATUS) == 0x01) ; // busy, no errors while (__inbyte(SMB0_STATUS) == 0x01); // busy, no errors
return __inbyte(SMB0_STATUS) ^ 0x02; // 0x02 = completed, no errors return __inbyte(SMB0_STATUS) ^ 0x02; // 0x02 = completed, no errors
} }