Add support for the LiPPERT Cool RoadRunner-LX embedded PC board:

- PC/104+ form factor
- AMD Geode-LX CPU/northbridge
- AMD CS5536 southbridge
- ITE IT8712F superio
http://www.lippert-at.com/index.php?id=408

Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3760 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

targets/lippert/roadrunner-lx/Config.lb

@@ -0,0 +1,62 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 LiPPERT Embedded Computers GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+# Config file for the LiPPERT Cool RoadRunner-LX,		--JR 10/2008
+# based on Config.lb for the AMD Geode LX/5536 DB800 platform.
+
+target roadrunner-lx
+mainboard lippert/roadrunner-lx
+
+# HACK to get the right TSC support.
+option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
+
+option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
+option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
+
+## Load payload (e.g. Linux) from IDE.
+#option CONFIG_ROM_PAYLOAD=0
+#option CONFIG_IDE=1
+#option CONFIG_FS_PAYLOAD=1
+#option CONFIG_FS_EXT2=1
+#option AUTOBOOT_DELAY=0
+#option AUTOBOOT_CMDLINE="hda1:/payload.elf"
+
+# Leave 36k for VSA. Usually board is equipped with a 512 KB FWH (LPC) flash,
+# however it can be replaced with a 1 MB chip.
+option ROM_SIZE=512*1024-36*1024
+#option ROM_SIZE=1024*1024-36*1024
+option FALLBACK_SIZE=ROM_SIZE
+
+#option DEFAULT_CONSOLE_LOGLEVEL = 4
+#option MAXIMUM_CONSOLE_LOGLEVEL = 4
+
+# Saves space on ROM_IMAGE_SIZE, but decompression costs a second on boot.
+option CONFIG_COMPRESS = 1
+
+romimage "image"
+	option USE_FALLBACK_IMAGE=1
+	option ROM_IMAGE_SIZE=64*1024
+	option COREBOOT_EXTRA_VERSION=".0"
+	payload ../payload.elf
+	# If getting payload from IDE
+	#payload /dev/null
+end
+
+buildrom ./coreboot.rom ROM_SIZE "image"