This commit updates the Geode LX GLCP delay control setup from the v2 way to the v3 way.

This resolves problems with terminated DRAM modules.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Roland G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/include/cpu/amd/lxdef.h

@@ -623,9 +623,16 @@
 #define SMM_OFFSET	0x80400000	/* above 2GB */
 #define SMM_SIZE	128			/* changed SMM_SIZE from 256 KB to 128 KB */
 
+/* DRAM_TERMINATED affects how the DELAY register is set. */
+#define DRAM_TERMINATED 'T'
+#define DRAM_UNTERMINATED 't'
+/* Bitfield definitions for the DELAY register */
+#define DELAY_UPPER_DISABLE_CLK135	(1 << 23)
+#define DELAY_LOWER_STATUS_MASK		0x7C0
+
 #if !defined(__ROMCC__)  && !defined(ASSEMBLY)
 #if defined(__PRE_RAM__)
-void cpuRegInit(void);
+void cpuRegInit(int debug_clock_disable, u8 dimm0, u8 dimm1, int terminated);
 void SystemPreInit(void);
 #endif
 void cpubug(void);

src/include/cpu/x86/msr.h

@@ -23,6 +23,12 @@ typedef struct msr_struct
 	unsigned hi;
 } msr_t;
 
+typedef struct msrinit_struct 
+{
+        unsigned index;
+        msr_t msr;
+} msrinit_t;
+
 static inline msr_t rdmsr(unsigned index)
 {
 	msr_t result;