mb/google/guybrush: Switch eSPI ALERT# to in-band
Using the push-pull alert was causing leakages when in S0i3. This is because the EC drives ALERT#, so when the AP enters S0i3, the extra current leaks into the SoC and ends up turning on the power regulators. By using in-band ALERT#, the EC no longer drives this pin high, thus fixing the leak. We could also have used an open drain alert, but the rise time is less than ideal. BUG=b:187122344, b:186135022 TEST=Measure S0i3 power on guybrush and validate it's no longer high. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I6de771aeda8feca062652f0ea9eb57d31cb68562 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52955 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com>
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Felix Held
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@ -35,7 +35,7 @@ chip soc/amd/cezanne
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.io_mode = ESPI_IO_MODE_QUAD,
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.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
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.crc_check_enable = 1,
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.alert_pin = ESPI_ALERT_PIN_PUSH_PULL,
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.alert_pin = ESPI_ALERT_PIN_IN_BAND,
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.periph_ch_en = 1,
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.vw_ch_en = 1,
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.oob_ch_en = 0,
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