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mb/google/zork/variants/vilboz: Enable BayHub lv2 driver

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Enable this driver along with power saving.

BUG=b:177955523
BRANCH=zork
TEST=boot and see this message:
BayHub LV2: Power-saving enabled 110102

Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: Icd87ea585dfaa2185abf1f7bf803e9c9a6e63972
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49822
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
John Su
2021-01-22 14:16:36 +08:00
committed by Patrick Georgi
parent 8fff297ea9
commit f37e8eaa77
2 changed files with 7 additions and 0 deletions
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1
src/mainboard/google/zork/Kconfig
View File

@ -46,6 +46,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select DRIVERS_USB_ACPI select DRIVERS_USB_ACPI
select DRIVERS_UART_ACPI select DRIVERS_UART_ACPI
select DRIVERS_GENERIC_BAYHUB_LV2
config ELOG_BOOT_COUNT_CMOS_OFFSET config ELOG_BOOT_COUNT_CMOS_OFFSET
int int

6
src/mainboard/google/zork/variants/vilboz/overridetree.cb
View File

@ -75,6 +75,12 @@ chip soc/amd/picasso
# See AMD 55570-B1 Table 13: PCI Device ID Assignments. # See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1510 inherit subsystemid 0x1022 0x1510 inherit
device pci 1.3 on
chip drivers/generic/bayhub_lv2
register "enable_power_saving" = "1"
device pci 00.0 on end
end
end # GPP Bridge 2 - SD
device pci 8.1 on device pci 8.1 on
device pci 0.5 on device pci 0.5 on
chip drivers/amd/i2s_machine_dev chip drivers/amd/i2s_machine_dev