AMD/Bettong: add function to read board version
Bettong uses 3 GPIO(5-7) pins to identify board. The GPIO ports are mapped to MMIO space. The GPIO value and board version are mapped as follow: GPIO5 GPIO6 GPIO7 Version 0 0 0 A 0 0 1 B ...... 1 1 1 H Change-Id: I72df28043057d8c4ccc4a2e645011ca5379e9928 Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/11732 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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		@@ -15,9 +15,11 @@
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romstage-y += BiosCallOuts.c
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					romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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					romstage-y += PlatformGnbPcie.c
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					romstage-y += boardid.c
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ramstage-y += BiosCallOuts.c
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					ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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					ramstage-y += PlatformGnbPcie.c
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ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
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					ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
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ramstage-y += fchec.c
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					ramstage-y += fchec.c
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endif
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					endif
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					ramstage-y += boardid.c
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								src/mainboard/amd/bettong/boardid.c
									
									
									
									
									
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								src/mainboard/amd/bettong/boardid.c
									
									
									
									
									
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							@@ -0,0 +1,48 @@
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					/*
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					 * This file is part of the coreboot project.
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					 *
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					 * Copyright (C) 2015 Advanced Micro Devices, Inc.
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					 *
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					 * This program is free software; you can redistribute it and/or modify
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					 * it under the terms of the GNU General Public License as published by
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					 * the Free Software Foundation; version 2 of the License.
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					 *
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					 * This program is distributed in the hope that it will be useful,
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					 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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					 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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					 * GNU General Public License for more details.
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					 */
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					#include <stdint.h>
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					#include <arch/io.h>
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					#include <boardid.h>
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					/**
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					 *Bettong uses 3 GPIO(5-7) pins to identify board.
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					 *The GPIO ports are mapped to MMIO space.
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					 *The GPIO value and board version are mapped as follow:
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					 *GPIO5 GPIO6 GPIO7 Version
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					 *  0     0     0      A
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					 *  0     0     1      B
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					 *  ......
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					 *  1     1     1      H
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					 */
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					uint8_t board_id(void)
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					{
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						void *gpiommioaddr;
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						u8  value = 0;
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						u8  boardrev = 0;
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						char boardid;
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						gpiommioaddr = (void *)0xfed80000ul + 0x1500;
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						value = read8(gpiommioaddr + (7 << 2) + 2); /* agpio7: board_id2 */
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						boardrev = value & 1;
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						value = read8(gpiommioaddr + (6 << 2) + 2); /* agpio6: board_id1 */
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						boardrev |= (value & 1) << 1;
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						value = read8(gpiommioaddr + (5 << 2) + 2); /* agpio5: board_id0 */
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						boardrev |= (value & 1) << 2;
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						boardid = 'A' + boardrev;
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						return boardid;
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					}
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