From f3c764303c159b810cef057a69e3186ec626e58c Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Thu, 9 Mar 2023 09:50:26 -0700 Subject: [PATCH] mb/system76/rpl: Declare child device on GLAN port Declare a child device on the GLAN port so the Ethernet controller is detected as an onboard device (eno) and not a plugged device (enp). Change-Id: I43f1b3b749081fd989bb2e5c04f3b616642a5a4f Signed-off-by: Tim Crawford --- src/mainboard/system76/rpl/variants/addw3/overridetree.cb | 1 + src/mainboard/system76/rpl/variants/gaze18/overridetree.cb | 1 + src/mainboard/system76/rpl/variants/oryp11/overridetree.cb | 1 + src/mainboard/system76/rpl/variants/serw13/overridetree.cb | 1 + 4 files changed, 4 insertions(+) diff --git a/src/mainboard/system76/rpl/variants/addw3/overridetree.cb b/src/mainboard/system76/rpl/variants/addw3/overridetree.cb index 72d730376e..d46ab9ec9d 100644 --- a/src/mainboard/system76/rpl/variants/addw3/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/addw3/overridetree.cb @@ -55,6 +55,7 @@ chip soc/intel/alderlake .clk_req = 13, .flags = PCIE_RP_LTR | PCIE_RP_CLK_REQ_DETECT, }" + device pci 00.0 on end end device ref pcie_rp5 on diff --git a/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb b/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb index c5eff9a532..25257732d6 100644 --- a/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb @@ -70,6 +70,7 @@ chip soc/intel/alderlake .clk_req = 6, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + device pci 00.0 on end end device ref pcie_rp10 on # PCH RP#10 x1, Clock 2 (WLAN) diff --git a/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb b/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb index 7d8592c324..8c5315ba67 100644 --- a/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb @@ -91,6 +91,7 @@ chip soc/intel/alderlake .clk_req = 6, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + device pci 00.0 on end end end end diff --git a/src/mainboard/system76/rpl/variants/serw13/overridetree.cb b/src/mainboard/system76/rpl/variants/serw13/overridetree.cb index e218f36f88..1923f71994 100644 --- a/src/mainboard/system76/rpl/variants/serw13/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/serw13/overridetree.cb @@ -55,6 +55,7 @@ chip soc/intel/alderlake .clk_req = 13, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + device pci 00.0 on end end device ref pcie_rp5 on