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soc/amd/common: Fix most checkpatch errors

Browse Source 
Correct the majority of reported errors and mark most of the
remaining ones as todo.  Some of the lines requiring a >80
break are indented too much currently.

Changes to agesawrapper.c cause the build to change, so this
file is also left as-is.  Make hex values consistently lower-case.

BUG=chrome-os-partner:622407746

Change-Id: I0464f0cafac4ee67edc95d377dcf7aab9a90c66b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson
2017-06-14 16:22:07 -06:00
committed by Martin Roth
parent 4e101ada37
commit f3dc71e031
10 changed files with 249 additions and 177 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
src/soc/amd/common/BiosCallOuts.h
View File

@@ -20,7 +20,7 @@
#include <Porting.h> #include <Porting.h>
#include <AGESA.h> #include <AGESA.h>
#define BIOS_HEAP_START_ADDRESS 0x010000000 #define BIOS_HEAP_START_ADDRESS 0x010000000
#define BIOS_HEAP_SIZE 0x30000 #define BIOS_HEAP_SIZE 0x30000
#define BSP_STACK_BASE_ADDR 0x30000 #define BSP_STACK_BASE_ADDR 0x30000
@@ -38,21 +38,23 @@ typedef struct _BIOS_BUFFER_NODE {
UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader); UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
void EmptyHeap(void); void EmptyHeap(void);
AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_AllocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_DeallocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_DeallocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_LocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_LocateBuffer(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_NoopUnsupported(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_NoopSuccess(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_EmptyIdsInitData(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_Reset(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_RunFuncOnAp(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt); AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData,
VOID *ConfigPrt);
AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr);
AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data,
VOID *ConfigPtr);
AGESA_STATUS GetBiosCallout (UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS GetBiosCallout(UINT32 Func, UINTN Data, VOID *ConfigPtr);
typedef struct { typedef struct {
UINT32 CalloutName; UINT32 CalloutName;

9
src/soc/amd/common/agesawrapper.h
View File

@@ -33,7 +33,7 @@ enum {
PICK_WHEA_MCE, /* WHEA MCE table */ PICK_WHEA_MCE, /* WHEA MCE table */
PICK_WHEA_CMC, /* WHEA CMV table */ PICK_WHEA_CMC, /* WHEA CMV table */
PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ PICK_ALIB, /* SACPI SSDT table with ALIB implementation */
PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */ PICK_IVRS, /* IOMMU ACPI IVRS (I/O Virt. Reporting Structure) */
PICK_CRAT, PICK_CRAT,
}; };
@@ -45,7 +45,8 @@ AGESA_STATUS agesawrapper_amdinitpost(void);
AGESA_STATUS agesawrapper_amdinitmid(void); AGESA_STATUS agesawrapper_amdinitmid(void);
AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus);
void *agesawrapper_getlateinitptr(int pick); void *agesawrapper_getlateinitptr(int pick);
AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINTN Data, void *ConfigPtr); AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINTN Data,
void *ConfigPtr);
AGESA_STATUS agesawrapper_amdS3Save(void); AGESA_STATUS agesawrapper_amdS3Save(void);
AGESA_STATUS agesawrapper_amdinitresume(void); AGESA_STATUS agesawrapper_amdinitresume(void);
AGESA_STATUS agesawrapper_amds3laterestore(void); AGESA_STATUS agesawrapper_amds3laterestore(void);
@@ -53,10 +54,10 @@ AGESA_STATUS agesawrapper_amds3laterestore(void);
AGESA_STATUS agesawrapper_fchs3earlyrestore(void); AGESA_STATUS agesawrapper_fchs3earlyrestore(void);
AGESA_STATUS agesawrapper_fchs3laterestore(void); AGESA_STATUS agesawrapper_fchs3laterestore(void);
VOID OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly); VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly);
VOID amd_initcpuio(void); VOID amd_initcpuio(void);
VOID amd_initmmio(void); VOID amd_initmmio(void);
const void *agesawrapper_locate_module (const CHAR8 name[8]); const void *agesawrapper_locate_module(const CHAR8 name[8]);
void OemPostParams(AMD_POST_PARAMS *PostParams); void OemPostParams(AMD_POST_PARAMS *PostParams);

7
src/soc/amd/common/agesawrapper_call.h
View File

@@ -30,14 +30,15 @@
* 0x6 = AGESA_CRITICAL * 0x6 = AGESA_CRITICAL
* 0x7 = AGESA_FATAL * 0x7 = AGESA_FATAL
*/ */
static const char * decodeAGESA_STATUS(AGESA_STATUS sret) static const char *decodeAGESA_STATUS(AGESA_STATUS sret)
{ {
const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED", const char *statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",
"AGESA_BOUNDS_CHK", "AGESA_ALERT", "AGESA_BOUNDS_CHK", "AGESA_ALERT",
"AGESA_WARNING", "AGESA_ERROR", "AGESA_WARNING", "AGESA_ERROR",
"AGESA_CRITICAL", "AGESA_FATAL" "AGESA_CRITICAL", "AGESA_FATAL"
}; };
if (sret > 7) return "unknown"; /* Non-AGESA error code */ if (sret > 7)
return "unknown"; /* Non-AGESA error code */
return statusStrings[sret]; return statusStrings[sret];
} }

118
src/soc/amd/common/amd_pci_util.c
View File

@@ -22,12 +22,10 @@
#include <amd_pci_int_defs.h> #include <amd_pci_int_defs.h>
#include <amd_pci_int_types.h> #include <amd_pci_int_types.h>
#ifndef __PRE_RAM__ const struct pirq_struct *pirq_data_ptr = NULL;
const struct pirq_struct * pirq_data_ptr = NULL;
u32 pirq_data_size = 0; u32 pirq_data_size = 0;
const u8 * intr_data_ptr = NULL; const u8 *intr_data_ptr = NULL;
const u8 * picr_data_ptr = NULL; const u8 *picr_data_ptr = NULL;
/* /*
* Read the FCH PCI_INTR registers 0xC00/0xC01 at a * Read the FCH PCI_INTR registers 0xC00/0xC01 at a
@@ -54,35 +52,41 @@ void write_pci_int_idx(u8 index, int mode, u8 data)
* given in global variables intr_data and picr_data. * given in global variables intr_data and picr_data.
* These variables are defined in mainboard.c * These variables are defined in mainboard.c
*/ */
void write_pci_int_table (void) void write_pci_int_table(void)
{ {
u8 byte; u8 byte;
if (picr_data_ptr == NULL || intr_data_ptr == NULL){ if (picr_data_ptr == NULL || intr_data_ptr == NULL) {
printk(BIOS_ERR, "Warning: Can't write PCI_INTR 0xC00/0xC01 registers because\n" printk(BIOS_ERR, "Warning: Can't write PCI_INTR 0xC00/0xC01"
"'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL\n"); " registers because\n"
"'mainboard_picr_data' or 'mainboard_intr_data'"
" tables are NULL\n");
return; return;
} }
/* PIC IRQ routine */ /* PIC IRQ routine */
printk(BIOS_DEBUG, "PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:\n" printk(BIOS_DEBUG, "PCI_INTR tables: Writing registers C00/C01 for PIC"
"\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n"); " mode PCI IRQ routing:\n"
for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) { "\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n");
for (byte = 0 ; byte < FCH_INT_TABLE_SIZE ; byte++) {
if (intr_types[byte]) { if (intr_types[byte]) {
write_pci_int_idx(byte, 0, (u8) picr_data_ptr[byte]); write_pci_int_idx(byte, 0, (u8) picr_data_ptr[byte]);
printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n", printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n",
byte, intr_types[byte], read_pci_int_idx(byte, 0)); byte, intr_types[byte],
read_pci_int_idx(byte, 0));
} }
} }
/* APIC IRQ routine */ /* APIC IRQ routine */
printk(BIOS_DEBUG, "PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:\n" printk(BIOS_DEBUG, "PCI_INTR tables: Writing registers C00/C01 for APIC"
"\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n"); " mode PCI IRQ routing:\n"
for (byte = 0; byte < FCH_INT_TABLE_SIZE; byte++) { "\tPCI_INTR_INDEX\t\tPCI_INTR_DATA\n");
for (byte = 0 ; byte < FCH_INT_TABLE_SIZE ; byte++) {
if (intr_types[byte]) { if (intr_types[byte]) {
write_pci_int_idx(byte, 1, (u8) intr_data_ptr[byte]); write_pci_int_idx(byte, 1, (u8) intr_data_ptr[byte]);
printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n", printk(BIOS_DEBUG, "\t0x%02X %s\t: 0x%02X\n",
byte, intr_types[byte], read_pci_int_idx(byte, 1)); byte, intr_types[byte],
read_pci_int_idx(byte, 1));
} }
} }
} }
@@ -94,29 +98,31 @@ void write_pci_int_table (void)
*/ */
void write_pci_cfg_irqs(void) void write_pci_cfg_irqs(void)
{ {
device_t dev = NULL; /* Our current device to route IRQs to */ device_t dev = NULL; /* Our current device to route IRQs */
device_t target_dev = NULL; /* The bridge that a device may be connected to */ device_t target_dev = NULL; /* to bridge a device may be connected to */
u16 int_pin = 0; /* Value of the INT_PIN register 0x3D */ u16 int_pin = 0; /* Value of the INT_PIN register 0x3D */
u16 target_pin = 0; /* Pin we will search our tables for */ u16 target_pin = 0; /* Pin we will search our tables for */
u16 int_line = 0; /* IRQ number read from PCI_INTR table and programmed to INT_LINE reg 0x3C */ u16 int_line = 0; /* IRQ # read from PCI_INTR tbl and write to 3C */
u16 pci_intr_idx = 0; /* Index into PCI_INTR table, 0xC00/0xC01 */ u16 pci_intr_idx = 0; /* Index into PCI_INTR table, 0xC00/0xC01 */
u8 bus = 0; /* A PCI Device Bus number */ u8 bus = 0; /* A PCI Device Bus number */
u16 devfn = 0; /* A PCI Device and Function number */ u16 devfn = 0; /* A PCI Device and Function number */
u8 bridged_device = 0; /* This device is on a PCI bridge */ u8 bridged_device = 0; /* This device is on a PCI bridge */
u32 i = 0; u32 i = 0;
if (pirq_data_ptr == NULL) { if (pirq_data_ptr == NULL) {
printk(BIOS_WARNING, "Warning: Can't write PCI IRQ assignments because" printk(BIOS_WARNING, "Warning: Can't write PCI IRQ assignments"
" 'mainboard_pirq_data' structure does not exist\n"); " because 'mainboard_pirq_data' structure does"
" not exist\n");
return; return;
} }
/* Populate the PCI cfg space header with the IRQ assignment */ /* Populate the PCI cfg space header with the IRQ assignment */
printk(BIOS_DEBUG, "PCI_CFG IRQ: Write PCI config space IRQ assignments\n"); printk(BIOS_DEBUG, "PCI_CFG IRQ: Write PCI config space IRQ"
" assignments\n");
for (dev = all_devices; dev; dev = dev->next) { for (dev = all_devices ; dev ; dev = dev->next) {
/* /*
* Step 1: Get the INT_PIN and device structure to look for in the * Step 1: Get INT_PIN and device structure to look for in the
* PCI_INTR table pirq_data * PCI_INTR table pirq_data
*/ */
target_dev = NULL; target_dev = NULL;
@@ -130,7 +136,7 @@ void write_pci_cfg_irqs(void)
/* Get the original INT_PIN for record keeping */ /* Get the original INT_PIN for record keeping */
int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN);
if (int_pin < 1 || int_pin > 4) if (int_pin < 1 || int_pin > 4)
continue; /* Device has invalid INT_PIN so skip it */ continue; /* Device has invalid INT_PIN - skip */
bus = target_dev->bus->secondary; bus = target_dev->bus->secondary;
devfn = target_dev->path.pci.devfn; devfn = target_dev->path.pci.devfn;
@@ -139,14 +145,15 @@ void write_pci_cfg_irqs(void)
* Step 2: Use the INT_PIN and DevFn number to find the PCI_INTR * Step 2: Use the INT_PIN and DevFn number to find the PCI_INTR
* register (0xC00) index for this device * register (0xC00) index for this device
*/ */
pci_intr_idx = 0xBAD; /* Will check to make sure it changed */ pci_intr_idx = 0xbad; /* Will check to make sure it changed */
for (i = 0; i < pirq_data_size; i++) { for (i = 0 ; i < pirq_data_size ; i++) {
if (pirq_data_ptr[i].devfn != devfn) if (pirq_data_ptr[i].devfn != devfn)
continue; continue;
/* PIN_A is index 0 in pirq_data array but 1 in PCI cfg reg */ /* PIN_A is idx0 in pirq_data array but 1 in PCI reg */
pci_intr_idx = pirq_data_ptr[i].PIN[target_pin - 1]; pci_intr_idx = pirq_data_ptr[i].PIN[target_pin - 1];
printk(BIOS_SPEW, "\tFound this device in pirq_data table entry %d\n", i); printk(BIOS_SPEW, "\tFound this device in pirq_data"
" table entry %d\n", i);
break; break;
} }
@@ -154,22 +161,32 @@ void write_pci_cfg_irqs(void)
* Step 3: Make sure we got a valid index and use it to get * Step 3: Make sure we got a valid index and use it to get
* the IRQ number from the PCI_INTR register table * the IRQ number from the PCI_INTR register table
*/ */
if (pci_intr_idx == 0xBAD) { /* Not on a bridge or in pirq_data table, skip it */ if (pci_intr_idx == 0xbad) {
printk(BIOS_SPEW, "PCI Devfn (0x%x) not found in pirq_data table\n", devfn); /* Not on a bridge or in pirq_data table, skip it */
printk(BIOS_SPEW, "PCI Devfn (0x%x) not found in"
" pirq_data table\n", devfn);
continue; continue;
} else if (pci_intr_idx == 0x1F) { /* Index found is not defined */ } else if (pci_intr_idx == 0x1f) {
printk(BIOS_SPEW, "Got index 0x1F (Not Connected), perhaps this device was defined wrong?\n"); /* Index found is not defined */
printk(BIOS_SPEW, "Got index 0x1F (Not Connected),"
" perhaps this device was"
" defined wrong?\n");
continue; continue;
} else if (pci_intr_idx >= FCH_INT_TABLE_SIZE) { /* Index out of bounds */ } else if (pci_intr_idx >= FCH_INT_TABLE_SIZE) {
printk(BIOS_ERR, "%s: got 0xC00/0xC01 table index 0x%x, max is 0x%x\n", /* Index out of bounds */
__func__, pci_intr_idx, FCH_INT_TABLE_SIZE); printk(BIOS_ERR, "%s: got 0xC00/0xC01 table index"
" 0x%x, max is 0x%x\n", __func__,
pci_intr_idx, FCH_INT_TABLE_SIZE);
continue; continue;
} }
/* Find the value to program into the INT_LINE register from the PCI_INTR registers */ /* Find the value to program into the INT_LINE register from
* the PCI_INTR registers
*/
int_line = read_pci_int_idx(pci_intr_idx, 0); int_line = read_pci_int_idx(pci_intr_idx, 0);
if (int_line == PIRQ_NC) { /* The IRQ found is disabled */ if (int_line == PIRQ_NC) { /* The IRQ found is disabled */
printk(BIOS_SPEW, "Got IRQ 0x1F (disabled), perhaps this device was defined wrong?\n"); printk(BIOS_SPEW, "Got IRQ 0x1F (disabled), perhaps"
" this device was defined wrong?\n");
continue; continue;
} }
@@ -180,7 +197,7 @@ void write_pci_cfg_irqs(void)
*/ */
pci_write_config8(dev, PCI_INTERRUPT_LINE, int_line); pci_write_config8(dev, PCI_INTERRUPT_LINE, int_line);
/* Set this IRQ to level triggered since it is used by a PCI device */ /* Set IRQ to level triggered since used by a PCI device */
i8259_configure_irq_trigger(int_line, IRQ_LEVEL_TRIGGERED); i8259_configure_irq_trigger(int_line, IRQ_LEVEL_TRIGGERED);
/* /*
@@ -190,11 +207,12 @@ void write_pci_cfg_irqs(void)
int_pin, pin_to_str(int_pin)); int_pin, pin_to_str(int_pin));
if (bridged_device) if (bridged_device)
printk(BIOS_SPEW, "\tSwizzled to\t: %d (%s)\n", printk(BIOS_SPEW, "\tSwizzled to\t: %d (%s)\n",
target_pin, pin_to_str(target_pin)); target_pin, pin_to_str(target_pin));
printk(BIOS_SPEW, "\tPCI_INTR idx\t: 0x%02x (%s)\n" printk(BIOS_SPEW, "\tPCI_INTR idx\t: 0x%02x (%s)\n"
"\tINT_LINE\t: 0x%X (IRQ %d)\n", "\tINT_LINE\t: 0x%X (IRQ %d)\n",
pci_intr_idx, intr_types[pci_intr_idx], int_line, int_line); pci_intr_idx, intr_types[pci_intr_idx],
int_line, int_line);
} /* for (dev = all_devices) */ } /* for (dev = all_devices) */
printk(BIOS_DEBUG, "PCI_CFG IRQ: Finished writing PCI config space IRQ assignments\n"); printk(BIOS_DEBUG, "PCI_CFG IRQ: Finished writing PCI config space"
" IRQ assignments\n");
} }
#endif /* __PRE_RAM__ */

8
src/soc/amd/common/amd_pci_util.h
View File

@@ -28,14 +28,14 @@ struct pirq_struct {
u8 PIN[4]; /* PINA/B/C/D are index 0/1/2/3 */ u8 PIN[4]; /* PINA/B/C/D are index 0/1/2/3 */
}; };
extern const struct pirq_struct * pirq_data_ptr; extern const struct pirq_struct *pirq_data_ptr;
extern u32 pirq_data_size; extern u32 pirq_data_size;
extern const u8 * intr_data_ptr; extern const u8 *intr_data_ptr;
extern const u8 * picr_data_ptr; extern const u8 *picr_data_ptr;
u8 read_pci_int_idx(u8 index, int mode); u8 read_pci_int_idx(u8 index, int mode);
void write_pci_int_idx(u8 index, int mode, u8 data); void write_pci_int_idx(u8 index, int mode, u8 data);
void write_pci_cfg_irqs(void); void write_pci_cfg_irqs(void);
void write_pci_int_table (void); void write_pci_int_table(void);
#endif /* AMD_PCI_UTIL_H */ #endif /* AMD_PCI_UTIL_H */

2
src/soc/amd/common/cache_as_ram.inc
View File

@@ -64,7 +64,7 @@ cache_as_ram_setup:
AMD_ENABLE_STACK AMD_ENABLE_STACK
/* Align the stack. */ /* Align the stack. */
and $0xFFFFFFF0, %esp and $0xfffffff0, %esp
#ifdef __x86_64__ #ifdef __x86_64__
/* switch to 64 bit long mode */ /* switch to 64 bit long mode */

63
src/soc/amd/common/def_callouts.c
View File

@@ -23,32 +23,33 @@
#include <agesawrapper.h> #include <agesawrapper.h>
#include <BiosCallOuts.h> #include <BiosCallOuts.h>
#include <dimmSpd.h> #include <dimmSpd.h>
#include <soc/hudson.h>
AGESA_STATUS GetBiosCallout (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS GetBiosCallout(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
UINTN i; UINTN i;
for (i = 0; i < BiosCalloutsLen; i++) { for (i = 0 ; i < BiosCalloutsLen ; i++) {
if (BiosCallouts[i].CalloutName == Func) if (BiosCallouts[i].CalloutName == Func)
break; break;
} }
if (i >= BiosCalloutsLen) if (i >= BiosCalloutsLen)
return AGESA_UNSUPPORTED; return AGESA_UNSUPPORTED;
return BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr); return BiosCallouts[i].CalloutPtr(Func, Data, ConfigPtr);
} }
AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_NoopUnsupported(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
return AGESA_UNSUPPORTED; return AGESA_UNSUPPORTED;
} }
AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_NoopSuccess(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
return AGESA_SUCCESS; return AGESA_SUCCESS;
} }
AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_EmptyIdsInitData(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
IDS_NV_ITEM *IdsPtr = ((IDS_CALLOUT_STRUCT *) ConfigPtr)->IdsNvPtr; IDS_NV_ITEM *IdsPtr = ((IDS_CALLOUT_STRUCT *) ConfigPtr)->IdsNvPtr;
if (Data == IDS_CALLOUT_INIT) if (Data == IDS_CALLOUT_INIT)
@@ -56,23 +57,22 @@ AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINTN Data, VOID *ConfigPtr)
return AGESA_SUCCESS; return AGESA_SUCCESS;
} }
AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_Reset(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
AGESA_STATUS Status; AGESA_STATUS Status;
UINT8 Value; UINT8 Value;
UINTN ResetType; UINTN ResetType;
AMD_CONFIG_PARAMS *StdHeader; AMD_CONFIG_PARAMS *StdHeader;
ResetType = Data; ResetType = Data;
StdHeader = ConfigPtr; StdHeader = ConfigPtr;
// /* Perform the RESET based upon the ResetType. In case of
// Perform the RESET based upon the ResetType. In case of * WARM_RESET_WHENEVER and COLD_RESET_WHENEVER, the request will go to
// WARM_RESET_WHENVER and COLD_RESET_WHENEVER, the request will go to * AmdResetManager. During the critical condition, where reset is
// AmdResetManager. During the critical condition, where reset is required * required immediately, the reset will be invoked directly by writing
// immediately, the reset will be invoked directly by writing 0x04 to port * 0x04 to port 0xCF9 (Reset Port).
// 0xCF9 (Reset Port). */
//
switch (ResetType) { switch (ResetType) {
case WARM_RESET_WHENEVER: case WARM_RESET_WHENEVER:
case COLD_RESET_WHENEVER: case COLD_RESET_WHENEVER:
@@ -81,7 +81,7 @@ AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr)
case WARM_RESET_IMMEDIATELY: case WARM_RESET_IMMEDIATELY:
case COLD_RESET_IMMEDIATELY: case COLD_RESET_IMMEDIATELY:
Value = 0x06; Value = 0x06;
LibAmdIoWrite (AccessWidth8, 0xCf9, &Value, StdHeader); LibAmdIoWrite(AccessWidth8, SYS_RESET, &Value, StdHeader);
break; break;
default: default:
@@ -92,29 +92,33 @@ AGESA_STATUS agesa_Reset (UINT32 Func, UINTN Data, VOID *ConfigPtr)
return Status; return Status;
} }
AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_RunFuncOnAp(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
AGESA_STATUS Status; AGESA_STATUS Status;
Status = agesawrapper_amdlaterunaptask (Func, Data, ConfigPtr); Status = agesawrapper_amdlaterunaptask(Func, Data, ConfigPtr);
return Status; return Status;
} }
AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt) AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData,
VOID *ConfigPrt)
{ {
GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt; GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo;
pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak( pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak(
"pci"CONFIG_VGA_BIOS_ID".rom", "pci"CONFIG_VGA_BIOS_ID".rom",
CBFS_TYPE_OPTIONROM, NULL); CBFS_TYPE_OPTIONROM, NULL);
printk(BIOS_DEBUG, "agesa_GfxGetVbiosImage: IMGptr=%p\n", pVbiosImageInfo->ImagePtr); printk(BIOS_DEBUG, "agesa_GfxGetVbiosImage: IMGptr=%p\n",
return (pVbiosImageInfo->ImagePtr ? AGESA_SUCCESS : AGESA_WARNING); pVbiosImageInfo->ImagePtr);
return pVbiosImageInfo->ImagePtr ? AGESA_SUCCESS : AGESA_WARNING;
} }
AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
AGESA_STATUS Status = AGESA_UNSUPPORTED; AGESA_STATUS Status = AGESA_UNSUPPORTED;
#ifdef __PRE_RAM__ #ifdef __PRE_RAM__
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr); Status = AmdMemoryReadSPD(Func, Data, ConfigPtr);
#endif #endif
return Status; return Status;
} }
@@ -122,6 +126,7 @@ AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr)
AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr) AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
AGESA_STATUS Status = AGESA_UNSUPPORTED; AGESA_STATUS Status = AGESA_UNSUPPORTED;
#ifdef __PRE_RAM__ #ifdef __PRE_RAM__
AGESA_READ_SPD_PARAMS *info = ConfigPtr; AGESA_READ_SPD_PARAMS *info = ConfigPtr;
if (info->MemChannelId > 0) if (info->MemChannelId > 0)
@@ -132,7 +137,7 @@ AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
return AGESA_UNSUPPORTED; return AGESA_UNSUPPORTED;
/* Read index 0, first SPD_SIZE bytes of spd.bin file. */ /* Read index 0, first SPD_SIZE bytes of spd.bin file. */
if (read_ddr3_spd_from_cbfs((u8*)info->Buffer, 0) < 0) if (read_ddr3_spd_from_cbfs((u8 *)info->Buffer, 0) < 0)
die("No SPD data\n"); die("No SPD data\n");
Status = AGESA_SUCCESS; Status = AGESA_SUCCESS;

3
src/soc/amd/common/dimmSpd.h
View File

@@ -17,7 +17,8 @@
#define _DIMMSPD_H_ #define _DIMMSPD_H_
AGESA_STATUS AGESA_STATUS
AmdMemoryReadSPD (IN UINT32 Func, IN UINTN Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData); AmdMemoryReadSPD(IN UINT32 Func, IN UINTN Data,
IN OUT AGESA_READ_SPD_PARAMS *SpdData);
int hudson_readSpd(int spdAddress, char *buf, size_t len); int hudson_readSpd(int spdAddress, char *buf, size_t len);
int smbus_readSpd(int spdAddress, char *buf, size_t len); int smbus_readSpd(int spdAddress, char *buf, size_t len);

186
src/soc/amd/common/heapmanager.c
View File

@@ -25,14 +25,14 @@ UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader)
UINT32 heap = BIOS_HEAP_START_ADDRESS; UINT32 heap = BIOS_HEAP_START_ADDRESS;
if (acpi_is_wakeup_s3()) if (acpi_is_wakeup_s3())
heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH); heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH);
return heap; return heap;
} }
void EmptyHeap(void) void EmptyHeap(void)
{ {
void *BiosManagerPtr = (void *) GetHeapBase(NULL); void *BiosManagerPtr = (void *)GetHeapBase(NULL);
memset(BiosManagerPtr, 0, BIOS_HEAP_SIZE); memset(BiosManagerPtr, 0, BIOS_HEAP_SIZE);
} }
@@ -54,26 +54,32 @@ AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
BIOS_HEAP_MANAGER *BiosHeapBasePtr; BIOS_HEAP_MANAGER *BiosHeapBasePtr;
AGESA_BUFFER_PARAMS *AllocParams; AGESA_BUFFER_PARAMS *AllocParams;
AllocParams = ((AGESA_BUFFER_PARAMS *) ConfigPtr); AllocParams = ((AGESA_BUFFER_PARAMS *)ConfigPtr);
AllocParams->BufferPointer = NULL; AllocParams->BufferPointer = NULL;
AvailableHeapSize = BIOS_HEAP_SIZE - sizeof(BIOS_HEAP_MANAGER); AvailableHeapSize = BIOS_HEAP_SIZE - sizeof(BIOS_HEAP_MANAGER);
BiosHeapBaseAddr = (UINT8 *) GetHeapBase(&(AllocParams->StdHeader)); BiosHeapBaseAddr = (UINT8 *)GetHeapBase(&(AllocParams->StdHeader));
BiosHeapBasePtr = (BIOS_HEAP_MANAGER *) BiosHeapBaseAddr; BiosHeapBasePtr = (BIOS_HEAP_MANAGER *)BiosHeapBaseAddr;
if (BiosHeapBasePtr->StartOfAllocatedNodes == 0) { if (BiosHeapBasePtr->StartOfAllocatedNodes == 0) {
/* First allocation */ /* First allocation */
CurrNodeOffset = sizeof(BIOS_HEAP_MANAGER); CurrNodeOffset = sizeof(BIOS_HEAP_MANAGER);
CurrNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + CurrNodeOffset); CurrNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ CurrNodeOffset);
CurrNodePtr->BufferHandle = AllocParams->BufferHandle; CurrNodePtr->BufferHandle = AllocParams->BufferHandle;
CurrNodePtr->BufferSize = AllocParams->BufferLength; CurrNodePtr->BufferSize = AllocParams->BufferLength;
CurrNodePtr->NextNodeOffset = 0; CurrNodePtr->NextNodeOffset = 0;
AllocParams->BufferPointer = (UINT8 *) CurrNodePtr + sizeof(BIOS_BUFFER_NODE); AllocParams->BufferPointer = (UINT8 *)CurrNodePtr
+ sizeof(BIOS_BUFFER_NODE);
/* Update the remaining free space */ /* Update the remaining free space */
FreedNodeOffset = CurrNodeOffset + CurrNodePtr->BufferSize + sizeof(BIOS_BUFFER_NODE); FreedNodeOffset = CurrNodeOffset + CurrNodePtr->BufferSize
FreedNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + FreedNodeOffset); + sizeof(BIOS_BUFFER_NODE);
FreedNodePtr->BufferSize = AvailableHeapSize - sizeof(BIOS_BUFFER_NODE) - CurrNodePtr->BufferSize; FreedNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ FreedNodeOffset);
FreedNodePtr->BufferSize = AvailableHeapSize
- sizeof(BIOS_BUFFER_NODE)
- CurrNodePtr->BufferSize;
FreedNodePtr->NextNodeOffset = 0; FreedNodePtr->NextNodeOffset = 0;
/* Update the offsets for Allocated and Freed nodes */ /* Update the offsets for Allocated and Freed nodes */
@@ -84,16 +90,20 @@ AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
* If it has, return AGESA_BOUNDS_CHK. * If it has, return AGESA_BOUNDS_CHK.
*/ */
CurrNodeOffset = BiosHeapBasePtr->StartOfAllocatedNodes; CurrNodeOffset = BiosHeapBasePtr->StartOfAllocatedNodes;
CurrNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + CurrNodeOffset); CurrNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ CurrNodeOffset);
while (CurrNodeOffset != 0) { while (CurrNodeOffset != 0) {
CurrNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + CurrNodeOffset); CurrNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
if (CurrNodePtr->BufferHandle == AllocParams->BufferHandle) { + CurrNodeOffset);
if (CurrNodePtr->BufferHandle ==
AllocParams->BufferHandle) {
return AGESA_BOUNDS_CHK; return AGESA_BOUNDS_CHK;
} }
CurrNodeOffset = CurrNodePtr->NextNodeOffset; CurrNodeOffset = CurrNodePtr->NextNodeOffset;
/* If BufferHandle has not been allocated on the heap, CurrNodePtr here points /* If BufferHandle has not been allocated on the heap,
* to the end of the allocated nodes list. * CurrNodePtr here points to the end of the allocated
* nodes list.
*/ */
} }
/* Find the node that best fits the requested buffer size */ /* Find the node that best fits the requested buffer size */
@@ -101,8 +111,9 @@ AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
PrevNodeOffset = FreedNodeOffset; PrevNodeOffset = FreedNodeOffset;
BestFitNodeOffset = 0; BestFitNodeOffset = 0;
BestFitPrevNodeOffset = 0; BestFitPrevNodeOffset = 0;
while (FreedNodeOffset != 0) { while (FreedNodeOffset != 0) { /* todo: simplify this */
FreedNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + FreedNodeOffset); FreedNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ FreedNodeOffset);
if (FreedNodePtr->BufferSize >= (AllocParams->BufferLength + sizeof(BIOS_BUFFER_NODE))) { if (FreedNodePtr->BufferSize >= (AllocParams->BufferLength + sizeof(BIOS_BUFFER_NODE))) {
if (BestFitNodeOffset == 0) { if (BestFitNodeOffset == 0) {
/* First node that fits the requested buffer size */ /* First node that fits the requested buffer size */
@@ -110,7 +121,7 @@ AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
BestFitPrevNodeOffset = PrevNodeOffset; BestFitPrevNodeOffset = PrevNodeOffset;
} else { } else {
/* Find out whether current node is a better fit than the previous nodes */ /* Find out whether current node is a better fit than the previous nodes */
BestFitNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + BestFitNodeOffset); BestFitNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr + BestFitNodeOffset);
if (BestFitNodePtr->BufferSize > FreedNodePtr->BufferSize) { if (BestFitNodePtr->BufferSize > FreedNodePtr->BufferSize) {
BestFitNodeOffset = FreedNodeOffset; BestFitNodeOffset = FreedNodeOffset;
BestFitPrevNodeOffset = PrevNodeOffset; BestFitPrevNodeOffset = PrevNodeOffset;
@@ -122,43 +133,64 @@ AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
} /* end of while loop */ } /* end of while loop */
if (BestFitNodeOffset == 0) { if (BestFitNodeOffset == 0) {
/* If we could not find a node that fits the requested buffer /* If we could not find a node that fits the requested
* size, return AGESA_BOUNDS_CHK. * buffer size, return AGESA_BOUNDS_CHK.
*/ */
return AGESA_BOUNDS_CHK; return AGESA_BOUNDS_CHK;
} else { } else {
BestFitNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + BestFitNodeOffset); BestFitNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
BestFitPrevNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + BestFitPrevNodeOffset); + BestFitNodeOffset);
BestFitPrevNodePtr = (BIOS_BUFFER_NODE *)
(BiosHeapBaseAddr
+ BestFitPrevNodeOffset);
/* If BestFitNode is larger than the requested buffer, fragment the node further */ /* If BestFitNode is larger than the requested buffer,
if (BestFitNodePtr->BufferSize > (AllocParams->BufferLength + sizeof(BIOS_BUFFER_NODE))) { * fragment the node further
NextFreeOffset = BestFitNodeOffset + AllocParams->BufferLength + sizeof(BIOS_BUFFER_NODE); */
if (BestFitNodePtr->BufferSize >
(AllocParams->BufferLength
+ sizeof(BIOS_BUFFER_NODE))) {
NextFreeOffset = BestFitNodeOffset
+ AllocParams->BufferLength
+ sizeof(BIOS_BUFFER_NODE);
NextFreePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + NextFreeOffset); NextFreePtr = (BIOS_BUFFER_NODE *)
NextFreePtr->BufferSize = BestFitNodePtr->BufferSize - (AllocParams->BufferLength + sizeof(BIOS_BUFFER_NODE)); (BiosHeapBaseAddr
NextFreePtr->NextNodeOffset = BestFitNodePtr->NextNodeOffset; + NextFreeOffset);
NextFreePtr->BufferSize =
BestFitNodePtr->BufferSize
- (AllocParams->BufferLength
+ sizeof(BIOS_BUFFER_NODE));
NextFreePtr->NextNodeOffset =
BestFitNodePtr->NextNodeOffset;
} else { } else {
/* Otherwise, next free node is NextNodeOffset of BestFitNode */ /* Otherwise, next free node is
* NextNodeOffset of BestFitNode
*/
NextFreeOffset = BestFitNodePtr->NextNodeOffset; NextFreeOffset = BestFitNodePtr->NextNodeOffset;
} }
/* If BestFitNode is the first buffer in the list, then update /* If BestFitNode is the first buffer in the list, then
* StartOfFreedNodes to reflect the new free node. * update StartOfFreedNodes to reflect new free node.
*/ */
if (BestFitNodeOffset == BiosHeapBasePtr->StartOfFreedNodes) { if (BestFitNodeOffset ==
BiosHeapBasePtr->StartOfFreedNodes = NextFreeOffset; BiosHeapBasePtr->StartOfFreedNodes)
} else { BiosHeapBasePtr->StartOfFreedNodes =
BestFitPrevNodePtr->NextNodeOffset = NextFreeOffset; NextFreeOffset;
} else
BestFitPrevNodePtr->NextNodeOffset =
NextFreeOffset;
/* Add BestFitNode to the list of Allocated nodes */ /* Add BestFitNode to the list of Allocated nodes */
CurrNodePtr->NextNodeOffset = BestFitNodeOffset; CurrNodePtr->NextNodeOffset = BestFitNodeOffset;
BestFitNodePtr->BufferSize = AllocParams->BufferLength; BestFitNodePtr->BufferSize = AllocParams->BufferLength;
BestFitNodePtr->BufferHandle = AllocParams->BufferHandle; BestFitNodePtr->BufferHandle =
AllocParams->BufferHandle;
BestFitNodePtr->NextNodeOffset = 0; BestFitNodePtr->NextNodeOffset = 0;
/* Remove BestFitNode from list of Freed nodes */ /* Remove BestFitNode from list of Freed nodes */
AllocParams->BufferPointer = (UINT8 *) BestFitNodePtr + sizeof(BIOS_BUFFER_NODE); AllocParams->BufferPointer = (UINT8 *)BestFitNodePtr
+ sizeof(BIOS_BUFFER_NODE);
} }
} }
@@ -181,50 +213,57 @@ AGESA_STATUS agesa_DeallocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
BIOS_HEAP_MANAGER *BiosHeapBasePtr; BIOS_HEAP_MANAGER *BiosHeapBasePtr;
AGESA_BUFFER_PARAMS *AllocParams; AGESA_BUFFER_PARAMS *AllocParams;
AllocParams = (AGESA_BUFFER_PARAMS *) ConfigPtr; AllocParams = (AGESA_BUFFER_PARAMS *)ConfigPtr;
BiosHeapBaseAddr = (UINT8 *) GetHeapBase(&(AllocParams->StdHeader)); BiosHeapBaseAddr = (UINT8 *)GetHeapBase(&(AllocParams->StdHeader));
BiosHeapBasePtr = (BIOS_HEAP_MANAGER *) BiosHeapBaseAddr; BiosHeapBasePtr = (BIOS_HEAP_MANAGER *)BiosHeapBaseAddr;
/* Find target node to deallocate in list of allocated nodes. /* Find target node to deallocate in list of allocated nodes.
* Return AGESA_BOUNDS_CHK if the BufferHandle is not found. * Return AGESA_BOUNDS_CHK if the BufferHandle is not found.
*/ */
AllocNodeOffset = BiosHeapBasePtr->StartOfAllocatedNodes; AllocNodeOffset = BiosHeapBasePtr->StartOfAllocatedNodes;
AllocNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + AllocNodeOffset); AllocNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr + AllocNodeOffset);
PrevNodeOffset = AllocNodeOffset; PrevNodeOffset = AllocNodeOffset;
while (AllocNodePtr->BufferHandle != AllocParams->BufferHandle) { while (AllocNodePtr->BufferHandle != AllocParams->BufferHandle) {
if (AllocNodePtr->NextNodeOffset == 0) { if (AllocNodePtr->NextNodeOffset == 0)
return AGESA_BOUNDS_CHK; return AGESA_BOUNDS_CHK;
}
PrevNodeOffset = AllocNodeOffset; PrevNodeOffset = AllocNodeOffset;
AllocNodeOffset = AllocNodePtr->NextNodeOffset; AllocNodeOffset = AllocNodePtr->NextNodeOffset;
AllocNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + AllocNodeOffset); AllocNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ AllocNodeOffset);
} }
/* Remove target node from list of allocated nodes */ /* Remove target node from list of allocated nodes */
PrevNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + PrevNodeOffset); PrevNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr + PrevNodeOffset);
PrevNodePtr->NextNodeOffset = AllocNodePtr->NextNodeOffset; PrevNodePtr->NextNodeOffset = AllocNodePtr->NextNodeOffset;
/* Zero out the buffer, and clear the BufferHandle */ /* Zero out the buffer, and clear the BufferHandle */
LibAmdMemFill ((UINT8 *)AllocNodePtr + sizeof(BIOS_BUFFER_NODE), 0, AllocNodePtr->BufferSize, &(AllocParams->StdHeader)); LibAmdMemFill((UINT8 *)AllocNodePtr + sizeof(BIOS_BUFFER_NODE), 0,
AllocNodePtr->BufferSize,
&(AllocParams->StdHeader));
AllocNodePtr->BufferHandle = 0; AllocNodePtr->BufferHandle = 0;
AllocNodePtr->BufferSize += sizeof(BIOS_BUFFER_NODE); AllocNodePtr->BufferSize += sizeof(BIOS_BUFFER_NODE);
/* Add deallocated node in order to the list of freed nodes */ /* Add deallocated node in order to the list of freed nodes */
FreedNodeOffset = BiosHeapBasePtr->StartOfFreedNodes; FreedNodeOffset = BiosHeapBasePtr->StartOfFreedNodes;
FreedNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + FreedNodeOffset); FreedNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr + FreedNodeOffset);
EndNodeOffset = AllocNodeOffset + AllocNodePtr->BufferSize; EndNodeOffset = AllocNodeOffset + AllocNodePtr->BufferSize;
if (AllocNodeOffset < FreedNodeOffset) { if (AllocNodeOffset < FreedNodeOffset) {
/* Add to the start of the freed list */ /* Add to the start of the freed list */
if (EndNodeOffset == FreedNodeOffset) { if (EndNodeOffset == FreedNodeOffset) {
/* If the freed node is adjacent to the first node in the list, concatenate both nodes */ /* If the freed node is adjacent to the first node in
* the list, concatenate both nodes
*/
AllocNodePtr->BufferSize += FreedNodePtr->BufferSize; AllocNodePtr->BufferSize += FreedNodePtr->BufferSize;
AllocNodePtr->NextNodeOffset = FreedNodePtr->NextNodeOffset; AllocNodePtr->NextNodeOffset =
FreedNodePtr->NextNodeOffset;
/* Clear the BufferSize and NextNodeOffset of the previous first node */ /* Clear the BufferSize and NextNodeOffset of the
* previous first node
*/
FreedNodePtr->BufferSize = 0; FreedNodePtr->BufferSize = 0;
FreedNodePtr->NextNodeOffset = 0; FreedNodePtr->NextNodeOffset = 0;
@@ -238,41 +277,46 @@ AGESA_STATUS agesa_DeallocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
/* Update StartOfFreedNodes to the new first node */ /* Update StartOfFreedNodes to the new first node */
BiosHeapBasePtr->StartOfFreedNodes = AllocNodeOffset; BiosHeapBasePtr->StartOfFreedNodes = AllocNodeOffset;
} else { } else {
/* Traverse list of freed nodes to find where the deallocated node /* Traverse list of freed nodes to find where the deallocated
* should be placed. * node should be placed.
*/ */
NextNodeOffset = FreedNodeOffset; NextNodeOffset = FreedNodeOffset;
NextNodePtr = FreedNodePtr; NextNodePtr = FreedNodePtr;
while (AllocNodeOffset > NextNodeOffset) { while (AllocNodeOffset > NextNodeOffset) {
PrevNodeOffset = NextNodeOffset; PrevNodeOffset = NextNodeOffset;
if (NextNodePtr->NextNodeOffset == 0) { if (NextNodePtr->NextNodeOffset == 0)
break; break;
}
NextNodeOffset = NextNodePtr->NextNodeOffset; NextNodeOffset = NextNodePtr->NextNodeOffset;
NextNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + NextNodeOffset); NextNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ NextNodeOffset);
} }
/* If deallocated node is adjacent to the next node, /* If deallocated node is adjacent to the next node,
* concatenate both nodes. * concatenate both nodes.
*/ */
if (NextNodeOffset == EndNodeOffset) { if (NextNodeOffset == EndNodeOffset) {
NextNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + NextNodeOffset); NextNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ NextNodeOffset);
AllocNodePtr->BufferSize += NextNodePtr->BufferSize; AllocNodePtr->BufferSize += NextNodePtr->BufferSize;
AllocNodePtr->NextNodeOffset = NextNodePtr->NextNodeOffset; AllocNodePtr->NextNodeOffset =
NextNodePtr->NextNodeOffset;
NextNodePtr->BufferSize = 0; NextNodePtr->BufferSize = 0;
NextNodePtr->NextNodeOffset = 0; NextNodePtr->NextNodeOffset = 0;
} else { } else {
/*AllocNodePtr->NextNodeOffset = FreedNodePtr->NextNodeOffset; */ /*AllocNodePtr->NextNodeOffset =
* FreedNodePtr->NextNodeOffset; */
AllocNodePtr->NextNodeOffset = NextNodeOffset; AllocNodePtr->NextNodeOffset = NextNodeOffset;
} }
/* If deallocated node is adjacent to the previous node, /* If deallocated node is adjacent to the previous node,
* concatenate both nodes. * concatenate both nodes.
*/ */
PrevNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + PrevNodeOffset); PrevNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ PrevNodeOffset);
EndNodeOffset = PrevNodeOffset + PrevNodePtr->BufferSize; EndNodeOffset = PrevNodeOffset + PrevNodePtr->BufferSize;
if (AllocNodeOffset == EndNodeOffset) { if (AllocNodeOffset == EndNodeOffset) {
PrevNodePtr->NextNodeOffset = AllocNodePtr->NextNodeOffset; PrevNodePtr->NextNodeOffset =
AllocNodePtr->NextNodeOffset;
PrevNodePtr->BufferSize += AllocNodePtr->BufferSize; PrevNodePtr->BufferSize += AllocNodePtr->BufferSize;
AllocNodePtr->BufferSize = 0; AllocNodePtr->BufferSize = 0;
@@ -288,17 +332,17 @@ AGESA_STATUS agesa_LocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
{ {
UINT32 AllocNodeOffset; UINT32 AllocNodeOffset;
UINT8 *BiosHeapBaseAddr; UINT8 *BiosHeapBaseAddr;
BIOS_BUFFER_NODE *AllocNodePtr; BIOS_BUFFER_NODE *AllocNodePtr;
BIOS_HEAP_MANAGER *BiosHeapBasePtr; BIOS_HEAP_MANAGER *BiosHeapBasePtr;
AGESA_BUFFER_PARAMS *AllocParams; AGESA_BUFFER_PARAMS *AllocParams;
AllocParams = (AGESA_BUFFER_PARAMS *) ConfigPtr; AllocParams = (AGESA_BUFFER_PARAMS *)ConfigPtr;
BiosHeapBaseAddr = (UINT8 *) GetHeapBase(&(AllocParams->StdHeader)); BiosHeapBaseAddr = (UINT8 *)GetHeapBase(&(AllocParams->StdHeader));
BiosHeapBasePtr = (BIOS_HEAP_MANAGER *) BiosHeapBaseAddr; BiosHeapBasePtr = (BIOS_HEAP_MANAGER *)BiosHeapBaseAddr;
AllocNodeOffset = BiosHeapBasePtr->StartOfAllocatedNodes; AllocNodeOffset = BiosHeapBasePtr->StartOfAllocatedNodes;
AllocNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + AllocNodeOffset); AllocNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr + AllocNodeOffset);
while (AllocParams->BufferHandle != AllocNodePtr->BufferHandle) { while (AllocParams->BufferHandle != AllocNodePtr->BufferHandle) {
if (AllocNodePtr->NextNodeOffset == 0) { if (AllocNodePtr->NextNodeOffset == 0) {
@@ -307,11 +351,13 @@ AGESA_STATUS agesa_LocateBuffer (UINT32 Func, UINTN Data, VOID *ConfigPtr)
return AGESA_BOUNDS_CHK; return AGESA_BOUNDS_CHK;
} else { } else {
AllocNodeOffset = AllocNodePtr->NextNodeOffset; AllocNodeOffset = AllocNodePtr->NextNodeOffset;
AllocNodePtr = (BIOS_BUFFER_NODE *) (BiosHeapBaseAddr + AllocNodeOffset); AllocNodePtr = (BIOS_BUFFER_NODE *)(BiosHeapBaseAddr
+ AllocNodeOffset);
} }
} }
AllocParams->BufferPointer = (UINT8 *) ((UINT8 *) AllocNodePtr + sizeof(BIOS_BUFFER_NODE)); AllocParams->BufferPointer = (UINT8 *)((UINT8 *)AllocNodePtr
+ sizeof(BIOS_BUFFER_NODE));
AllocParams->BufferLength = AllocNodePtr->BufferSize; AllocParams->BufferLength = AllocNodePtr->BufferSize;
return AGESA_SUCCESS; return AGESA_SUCCESS;

2
src/soc/amd/common/spi.c
View File

@@ -36,6 +36,4 @@ void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
spi_flash_write(flash, pos + sizeof(len), len, buf); spi_flash_write(flash, pos + sizeof(len), len, buf);
spi_flash_volatile_group_end(flash); spi_flash_volatile_group_end(flash);
return;
} }