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libpayload: remove uhci_reg_maskX

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Not that good an idea to start with.

Coccinelle patch:
@@
@@
-void
(
-uhci_reg_mask8
|
-uhci_reg_mask16
|
-uhci_reg_mask32
)
- (...) { ... }

@@
@@
-void
(
-uhci_reg_mask8
|
-uhci_reg_mask16
|
-uhci_reg_mask32
)
- (...);

@@
expression ctrl, reg, ormask;
@@
-uhci_reg_mask32 (ctrl, reg, ~0, ormask)
+uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) | ormask)

@@
expression ctrl, reg, ormask;
@@
-uhci_reg_mask16 (ctrl, reg, ~0, ormask)
+uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) | ormask)

@@
expression ctrl, reg, ormask;
@@
-uhci_reg_mask8 (ctrl, reg, ~0, ormask)
+uhci_reg_write8 (ctrl, reg, uhci_reg_read8 (ctrl, reg) | ormask)

@@
expression ctrl, reg, andmask;
@@
-uhci_reg_mask32 (ctrl, reg, andmask, 0)
+uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) & andmask)

@@
expression ctrl, reg, andmask;
@@
-uhci_reg_mask16 (ctrl, reg, andmask, 0)
+uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask)

@@
expression ctrl, reg, andmask;
@@
-uhci_reg_mask16 (ctrl, reg, andmask, 0)
+uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask)

Change-Id: Id0eb8327293831e54249d43fd06d50963c793699
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/477
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2011-11-18 14:44:16 +01:00
committed by Patrick Georgi
parent 44bf6fcbb2
commit f42fdabe65
3 changed files with 22 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
payloads/libpayload/drivers/usb/uhci_rh.c
View File

@@ -53,14 +53,18 @@ uhci_rh_enable_port (usbdev_t *dev, int port)
return;
}
uhci_reg_mask16 (controller, port, ~(1 << 12), 0); /* wakeup */
uhci_reg_write16(controller, port,
uhci_reg_read16(controller, port) & ~(1 << 12)); /* wakeup */
uhci_reg_mask16 (controller, port, ~0, 1 << 9); /* reset */
uhci_reg_write16(controller, port,
uhci_reg_read16(controller, port) | 1 << 9); /* reset */
mdelay (30); // >10ms
uhci_reg_mask16 (controller, port, ~(1 << 9), 0);
uhci_reg_write16(controller, port,
uhci_reg_read16(controller, port) & ~(1 << 9));
mdelay (1); // >5.3us per spec, <3ms because some devices make trouble
uhci_reg_mask16 (controller, port, ~0, 1 << 2); /* enable */
uhci_reg_write16(controller, port,
uhci_reg_read16(controller, port) | 1 << 2); /* enable */
do {
value = uhci_reg_read16 (controller, port);
mdelay (1);
@@ -75,7 +79,8 @@ uhci_rh_disable_port (usbdev_t *dev, int port)
port = PORTSC2;
if (port == 1)
port = PORTSC1;
uhci_reg_mask16 (controller, port, ~4, 0);
uhci_reg_write16(controller, port,
uhci_reg_read16(controller, port) & ~4);
int value;
do {
value = uhci_reg_read16 (controller, port);
@@ -102,7 +107,8 @@ uhci_rh_scanport (usbdev_t *dev, int port)
usb_detach_device(dev->controller, devno);
RH_INST (dev)->port[offset] = -1;
}
uhci_reg_mask16 (dev->controller, portsc, ~0, (1 << 3) | (1 << 2)); // clear port state change, enable port
uhci_reg_write16(dev->controller, portsc,
uhci_reg_read16(dev->controller, portsc) | (1 << 3) | (1 << 2)); // clear port state change, enable port
mdelay(100); // wait for signal to stabilize