skylake: SPI code cleanup

Move base address into iomap.h.  Use PCI symbols instead of SPI specific
symbols.  Fix comments.

BRANCH=none
BUG=chrome-os-partner:44827
TEST=Build and run on kunimitsu

Change-Id: Id5d21603150b52fd1b71dd448105938bd6aff1a9
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: http://review.coreboot.org/11826
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/soc/intel/skylake/pch.c

@@ -45,11 +45,11 @@ void *get_spi_bar(void)
 	device_t dev = PCH_DEV_SPI;
 	uint32_t bar;
 
-	bar = pci_read_config32(dev, PCH_SPI_BASE_ADDRESS);
+	bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
 	/* Bits 31-12 are the base address as per EDS for SPI 1F/5,
 	 *  Don't care about  0-11 bit
 	 */
-	return (void *)(bar & ~(B_PCH_SPI_BAR0_MASK));
+	return (void *)(bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK);
 }
 
 u32 pch_read_soft_strap(int id)