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ipq8064: Make timer code compile

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Commment out nonessential timer services and modify the source code to
cleanly build in coeboot environment. Do not remove dead code just
yet, these functions might be necessary later.

Need to rename the soc timer.h to prevent collisions with timer.h in
the top level include directory.

Currently build timer code for ramstage only.

BUG=chrome-os-partner:27784
TEST='emerge-storm coreboot' still succeeds

Original-Change-Id: Ib10133ccb42697840708845a8ea6d75ceeaeb3d5
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/194067
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 987ce95220953c16216d1e1d70d5a941d05fc9bc)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ia9cf175da11c70709354def5e51bf79df4fda2fe
Reviewed-on: http://review.coreboot.org/7269
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Vadim Bendebury
2014-04-09 19:23:04 -07:00
committed by Marc Jones
parent 028d816fe5
commit f4b209f19c
6 changed files with 54 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

46
src/soc/qualcomm/ipq806x/timer.c
View File

@@ -31,14 +31,10 @@
* SUCH DAMAGE.
*/
#include <asm/arch-ipq806x/iomap.h>
#include <asm/io.h>
#include <common.h>
#include <asm/types.h>
#include <asm/arch-ipq806x/timer.h>
static ulong timestamp;
static ulong lastinc;
#include <delay.h>
#include <iomap.h>
#include <ipq_timer.h>
#include <timer.h>
#define GPT_FREQ_KHZ 32
#define GPT_FREQ (GPT_FREQ_KHZ * 1000) /* 32 KHz */
@@ -46,36 +42,24 @@ static ulong lastinc;
/**
* timer_init - initialize timer
*/
int timer_init(void)
void init_timer(void)
{
writel(0, GPT_ENABLE);
writel(GPT_ENABLE_EN, GPT_ENABLE);
return 0;
}
/**
* get_timer - returns time lapsed
* @base: base/start time
*
* Returns time lapsed, since the specified base time value.
*/
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
/**
* __udelay - generates micro second delay.
* udelay - generates micro second delay.
* @usec: delay duration in microseconds
*
* With 32KHz clock, minimum possible delay is 31.25 Micro seconds and
* its multiples. In Rumi GPT clock is 32 KHz
*/
void __udelay(unsigned long usec)
void udelay(unsigned usec)
{
unsigned int val;
ulong now, last;
ulong runcount;
unsigned val;
unsigned now, last;
unsigned runcount;
usec = (usec + GPT_FREQ_KHZ - 1) / GPT_FREQ_KHZ;
last = readl(GPT_COUNT_VAL);
@@ -92,6 +76,15 @@ void __udelay(unsigned long usec)
} while (runcount < val);
}
#if 0
/*
* TODO(vbendeb) clean it up later.
* Compile out the below code but leave it for now in case it will become
* necessary later in order to make the platform fully functional.
*/
static unsigned long timestamp;
static unsigned long lastinc;
inline ulong gpt_to_sys_freq(unsigned int gpt)
{
@@ -137,3 +130,4 @@ ulong get_tbclk(void)
{
return GPT_FREQ;
}
#endif