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sb/intel/ibexpeak: Add CIR initialization

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This properly sets up the chipset initialization registers, instead of
replaying an RCBA dump.

The information is taken from the EDS and from the thinkpad x201
vendor BIOS disassembly and from an HP UEFI.

TESTED on Thinkpad X201. Seems stable at booting, rebooting and resume
from S3.

Change-Id: I21c2beaf70da27dbe6a56e2612df2c257c05fc62
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans
2019-09-16 21:00:22 +02:00
parent e552d073b7
commit f503b60bb9
5 changed files with 120 additions and 34 deletions
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21
src/mainboard/packardbell/ms2290/romstage.c
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@@ -61,21 +61,6 @@ static void rcba_config(void)
southbridge_configure_default_intmap();
static const u32 rcba_dump3[] = {
/* 3310 */ 0x02060100, 0x0000000f, 0x01020000, 0x80000000,
/* 3320 */ 0x00000000, 0x04000000, 0x00000000, 0x00000000,
/* 3330 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 3340 */ 0x000fffff, 0x00000000, 0x00000000, 0x00000000,
/* 3350 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 3360 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 3370 */ 0x00000000, 0x00000000, 0x7f8fdfff, 0x00000000,
/* 3380 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 3390 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 33a0 */ 0x00003900, 0x00000000, 0x00000000, 0x00000000,
/* 33b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 33c0 */ 0x00010000, 0x00000000, 0x00000000, 0x0001004b,
/* 33d0 */ 0x06000008, 0x00010000, 0x00000000, 0x00000000,
/* 33e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 33f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 3400 */ 0x0000001c, 0x00000080, 0x00000000, 0x00000000,
/* 3410 */ 0x00000c61, 0x00000000, 0x16fc1fe1, 0xbf4f001f,
/* 3420 */ 0x00000000, 0x00060010, 0x0000001d, 0x00000000,
@@ -131,8 +116,8 @@ static void rcba_config(void)
unsigned i;
for (i = 0; i < sizeof(rcba_dump3) / 4; i++) {
RCBA32(4 * i + 0x3310) = rcba_dump3[i];
(void)RCBA32(4 * i + 0x3310);
RCBA32(4 * i + 0x3400) = rcba_dump3[i];
(void)RCBA32(4 * i + 0x3400);
}
}
@@ -181,6 +166,8 @@ void mainboard_romstage_entry(void)
setup_pch_gpios(&mainboard_gpio_map);
pch_setup_cir(NEHALEM_MOBILE);
/* This should probably go away. Until now it is required
* and mainboard specific
*/