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soc/intel: Rename 200-series PCH device IDs

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The code name for these PCHs is Union Point, abbreviated as `UPT`. There
are some 300-series Union Point PCHs (H310C, B365, Z370) which are meant
to be paired with Coffee Lake CPUs instead of Skylake or Kaby Lake CPUs,
and referring to them as `KBP` (Kaby Point, I guess) would be confusing.

Tested with BUILD_TIMELESS=1, HP 280 G2 remains identical.

Change-Id: I1a49115ae7ac37e76ce8d440910fb59926f34fac
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52700
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Timofey Komarov <happycorsair@yandex.ru>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
2021-04-27 10:20:04 +02:00
committed by Nico Huber
parent 0129393a6b
commit f530e363d1
8 changed files with 90 additions and 90 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
src/include/device/pci_ids.h
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@@ -2851,17 +2851,17 @@
#define PCI_DEVICE_ID_INTEL_LWB_C627A_SUPER 0xa24b
#define PCI_DEVICE_ID_INTEL_LWB_C629A_SUPER 0xa24c
#define PCI_DEVICE_ID_INTEL_EMB_SUPER 0x1b81
#define PCI_DEVICE_ID_INTEL_KBP_H_H270 0xa2c4
#define PCI_DEVICE_ID_INTEL_KBP_H_Z270 0xa2c5
#define PCI_DEVICE_ID_INTEL_KBP_H_Q270 0xa2c6
#define PCI_DEVICE_ID_INTEL_KBP_H_Q250 0xa2c7
#define PCI_DEVICE_ID_INTEL_KBP_H_B250 0xa2c8
#define PCI_DEVICE_ID_INTEL_UPT_H_H270 0xa2c4
#define PCI_DEVICE_ID_INTEL_UPT_H_Z270 0xa2c5
#define PCI_DEVICE_ID_INTEL_UPT_H_Q270 0xa2c6
#define PCI_DEVICE_ID_INTEL_UPT_H_Q250 0xa2c7
#define PCI_DEVICE_ID_INTEL_UPT_H_B250 0xa2c8
#define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22 0x9d4b
#define PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22 0x9d4e
#define PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22 0x9d50
#define PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU 0x9d51
#define PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM 0x9d58
#define PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM 0x9d56
#define PCI_DEVICE_ID_INTEL_UPT_LP_SUPER_SKU 0x9d51
#define PCI_DEVICE_ID_INTEL_UPT_LP_U_PREMIUM 0x9d58
#define PCI_DEVICE_ID_INTEL_UPT_LP_Y_PREMIUM 0x9d56
#define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8
#define PCI_DEVICE_ID_INTEL_GLK_LPC 0x31e8
#define PCI_DEVICE_ID_INTEL_GLK_ESPI 0x3197
@@ -3132,30 +3132,30 @@
#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19_SUPER 0xa269
#define PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20_SUPER 0xa26a
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP1 0xa290
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP2 0xa291
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP3 0xa292
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP4 0xa293
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP5 0xa294
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP6 0xa295
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP7 0xa296
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP8 0xa297
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP9 0xa298
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP10 0xa299
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP11 0xa29a
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP12 0xa29b
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP13 0xa29c
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP14 0xa29d
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP15 0xa29e
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP16 0xa29f
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP17 0xa2e7
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP18 0xa2e8
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP19 0xa2e9
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP20 0xa2ea
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP21 0xa2eb
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP22 0xa2ec
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP23 0xa2ed
#define PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP24 0xa2ee
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP1 0xa290
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP2 0xa291
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP3 0xa292
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP4 0xa293
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP5 0xa294
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP6 0xa295
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP7 0xa296
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP8 0xa297
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP9 0xa298
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP10 0xa299
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP11 0xa29a
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP12 0xa29b
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP13 0xa29c
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP14 0xa29d
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP15 0xa29e
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP16 0xa29f
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP17 0xa2e7
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP18 0xa2e8
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP19 0xa2e9
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP20 0xa2ea
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP21 0xa2eb
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP22 0xa2ec
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP23 0xa2ed
#define PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP24 0xa2ee
#define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP1 0x9db8
#define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP2 0x9db9
@@ -3421,7 +3421,7 @@
#define PCI_DEVICE_ID_INTEL_SPT_H_PMC 0xa121
#define PCI_DEVICE_ID_INTEL_LWB_PMC 0xa1a1
#define PCI_DEVICE_ID_INTEL_LWB_PMC_SUPER 0xa221
#define PCI_DEVICE_ID_INTEL_KBP_H_PMC 0xa2a1
#define PCI_DEVICE_ID_INTEL_UPT_H_PMC 0xa2a1
#define PCI_DEVICE_ID_INTEL_APL_PMC 0x5a94
#define PCI_DEVICE_ID_INTEL_GLK_PMC 0x3194
#define PCI_DEVICE_ID_INTEL_CNL_PMC 0x9da1
@@ -3445,10 +3445,10 @@
#define PCI_DEVICE_ID_INTEL_SPT_I2C3 0x9d63
#define PCI_DEVICE_ID_INTEL_SPT_I2C4 0x9d64
#define PCI_DEVICE_ID_INTEL_SPT_I2C5 0x9d65
#define PCI_DEVICE_ID_INTEL_KBP_H_I2C0 0xa2e0
#define PCI_DEVICE_ID_INTEL_KBP_H_I2C1 0xa2e1
#define PCI_DEVICE_ID_INTEL_KBP_H_I2C2 0xa2e2
#define PCI_DEVICE_ID_INTEL_KBP_H_I2C3 0xa2e3
#define PCI_DEVICE_ID_INTEL_UPT_H_I2C0 0xa2e0
#define PCI_DEVICE_ID_INTEL_UPT_H_I2C1 0xa2e1
#define PCI_DEVICE_ID_INTEL_UPT_H_I2C2 0xa2e2
#define PCI_DEVICE_ID_INTEL_UPT_H_I2C3 0xa2e3
#define PCI_DEVICE_ID_INTEL_APL_I2C0 0x5aac
#define PCI_DEVICE_ID_INTEL_APL_I2C1 0x5aae
#define PCI_DEVICE_ID_INTEL_APL_I2C2 0x5ab0
@@ -3545,9 +3545,9 @@
#define PCI_DEVICE_ID_INTEL_SPT_H_UART0 0xa127
#define PCI_DEVICE_ID_INTEL_SPT_H_UART1 0xa128
#define PCI_DEVICE_ID_INTEL_SPT_H_UART2 0xa166
#define PCI_DEVICE_ID_INTEL_KBP_H_UART0 0xa2a7
#define PCI_DEVICE_ID_INTEL_KBP_H_UART1 0xa2a8
#define PCI_DEVICE_ID_INTEL_KBP_H_UART2 0xa2e6
#define PCI_DEVICE_ID_INTEL_UPT_H_UART0 0xa2a7
#define PCI_DEVICE_ID_INTEL_UPT_H_UART1 0xa2a8
#define PCI_DEVICE_ID_INTEL_UPT_H_UART2 0xa2e6
#define PCI_DEVICE_ID_INTEL_APL_UART0 0x5abc
#define PCI_DEVICE_ID_INTEL_APL_UART1 0x5abe
#define PCI_DEVICE_ID_INTEL_APL_UART2 0x5ac0
@@ -3948,7 +3948,7 @@
#define PCI_DEVICE_ID_INTEL_SPT_H_XHCI 0xa12f
#define PCI_DEVICE_ID_INTEL_LWB_XHCI 0xa1af
#define PCI_DEVICE_ID_INTEL_LWB_XHCI_SUPER 0xa22f
#define PCI_DEVICE_ID_INTEL_KBP_H_XHCI 0xa2af
#define PCI_DEVICE_ID_INTEL_UPT_H_XHCI 0xa2af
#define PCI_DEVICE_ID_INTEL_CNL_LP_XHCI 0x9ded
#define PCI_DEVICE_ID_INTEL_CNP_H_XHCI 0xa36d
#define PCI_DEVICE_ID_INTEL_ICP_LP_XHCI 0x34ed