google/chromeos: disable platform hierarchy on resume for TPM2

On Chrome OS devices that use TPM2 parts the platform hierarchy
is disabled by the boot loader, depthcharge. Since the bootloader
isn't involved in resuming a suspended machine there's no equivalent
action in coreboot to disable the platform hierarchy. Therefore, to
ensure consistent state in resume the platform hierarchy in the TPM2
needs to be disabled as well. For systems that resume using the
firmware the platform hierarchy is disabled when utilizing
TPM2 devices.

BUG=chrome-os-partner:61097
BRANCH=reef
TEST=Suspend and resume. Confirmed 'stop trunksd; tpmc getvf; start
trunksd' shows that phEnable is 0.

Change-Id: I060252f338c8fd68389273224ee58caa99881de8
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/18096
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

src/vendorcode/google/chromeos/Kconfig

@@ -127,6 +127,20 @@ config CHROMEOS_FWID_VERSION
 	  This is the second part of the FWID written to various regions of a
 	  Chrome OS firmware image to identify its version.
 
+config CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME
+	bool
+	default y
+	depends on TPM2 && RESUME_PATH_SAME_AS_BOOT
+	help
+	  Disable the platform heirarchy on resume path if the firmware
+	  is involved in resume. The hierarchy is disabled prior to jumping
+	  to the OS.  Note that this option is sepcific to TPM2 boards.
+	  This option is auto selected if CHROMEOS because it matches with
+	  vboot_reference model which disables the platform hierarchy in
+	  the boot loader. However, those operations need to be symmetric
+	  on normal boot as well as resume and coreboot is only involved
+	  in the resume piece w.r.t. the platform hierarchy.
+
 menu "GBB configuration"
 
 config GBB_HWID

src/vendorcode/google/chromeos/Makefile.inc

@@ -24,6 +24,7 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
 ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c
 romstage-y += vpd_decode.c
 ramstage-y += vpd_decode.c cros_vpd.c vpd_mac.c vpd_serialno.c vpd_calibration.c
+ramstage-$(CONFIG_CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME) += tpm2.c
 ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c
 ramstage-$(CONFIG_USE_SAR) += sar.c
 ifeq ($(CONFIG_ARCH_MIPS),)

src/vendorcode/google/chromeos/tpm2.c

@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <console/console.h>
+#include <tpm_lite/tlcl.h>
+#include <vb2_api.h>
+
+static void disable_platform_hierarchy(void *unused)
+{
+	int ret;
+
+	if (!IS_ENABLED(CONFIG_TPM2))
+		return;
+
+	if (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT))
+		return;
+
+	ret = tlcl_lib_init();
+
+	if (ret != VB2_SUCCESS) {
+		printk(BIOS_ERR, "tlcl_lib_init() failed: %x\n", ret);
+		return;
+	}
+
+	ret = tlcl_disable_platform_hierarchy();
+	if (ret != TPM_SUCCESS)
+		printk(BIOS_ERR, "Platform hierarchy disablement failed: %x\n",
+			ret);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, disable_platform_hierarchy,
+			NULL);