soc/intel/common/block/cpu: Add option to skip coreboot AP init

SoC users from IOTG team is looking forward for a solution to skip
coreboot AP initialization flow and make use of FSPS-UPD to
perform AP reset.

TEST=Assign use_fsp_mp_init=1 to ensure coreboot is not bringing APs
out of reset.

Change-Id: Ibc8cd411e802fb682436a933073922b2693ba994
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/soc/intel/skylake/chip_fsp20.c

@@ -29,6 +29,7 @@
 #include <device/pci_ids.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
+#include <intelblocks/chip.h>
 #include <intelblocks/xdci.h>
 #include <intelpch/lockdown.h>
 #include <romstage_handoff.h>
@@ -388,7 +389,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	params->PchSirqEnable = config->SerialIrqConfigSirqEnable;
 	params->PchSirqMode = config->SerialIrqConfigSirqMode;
 
-	params->CpuConfig.Bits.SkipMpInit = !config->use_fsp_mp_init;
+	params->CpuConfig.Bits.SkipMpInit = !chip_get_fsp_mp_init();
 
 	for (i = 0; i < ARRAY_SIZE(config->i2c_voltage); i++)
 		params->SerialIoI2cVoltage[i] = config->i2c_voltage[i];